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ABSTRACT
This paper presents an analytical model for the behavior of dataflow graphs with data-dependent control flow and discusses its suitability to the generation of efficient software and hardware implementations of digital signal processing (DSP) applications. In the model, the number of tokens produced or consumed by each actor is given as a symbolic function of the Boolean values in the system; in addition, it may vary cyclically to permit more memory-efficient multirate implementations. The model can be used to extend the ability of block-diagram-oriented systems for DSP design, such as Ptolemy [1], to produce efficient hardware and software implementations; this permits the hardware-software codesign techniques of [2] to be efficiently targeted at a wider class of problems, those involving some asynchronous behavior, for example.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 2
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Mainak Sen , Ivan Corretjer , Fiorella Haim , Sankalita Saha , Jason Schlessman , Tiehan Lv , Shuvra S. Bhattacharyya , Wayne Wolf, Dataflow-based mapping of computer vision algorithms onto FPGAs, EURASIP Journal on Embedded Systems, v.2007 n.1, p.29-29, January 2007
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