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BIST and production testing of ADCs using imprecise stimulus
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Source ACM Transactions on Design Automation of Electronic Systems (TODAES) archive
Volume 8 ,  Issue 4  (October 2003) table of contents
Pages: 522 - 545  
Year of Publication: 2003
ISSN:1084-4309
Authors
Kumar Parthasarathy  Texas Instruments Inc., Dallas, TX
Turker Kuyel  Texas Instruments Inc., Dallas, TX
Dana Price  Motorola Inc., Tempe, AZ
Le Jin  Iowa State University, Ames, IA
Degang Chen  Iowa State University, Ames, IA
Randall Geiger  Iowa State University, Ames, IA
Publisher
ACM  New York, NY, USA
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ABSTRACT

A new approach for testing mixed-signal circuits based upon using imprecise stimuli is introduced. Unlike most existing Built-In Self-Test (BIST) and production test approaches that require excitation signals that are at least 3 bits or more linear than the Device-Under-Test (DUT), the proposed approach can work with stimuli that are several bits less linear than the DUT. This dramatically reduces the requirements on stimulus generation for BIST applications and offers potential for using inexpensive signal generators in production test, or for testing DUTs that have a linearity performance exceeding that of the available test equipment. As a proof of concept, a histogram-based algorithm for linearity testing for Analog-to-Digital Converters (ADCs) has been proposed. It can estimate the Integral Nonlinearity (INL) and Differential Nonlinearity (DNL) of an n-bit ADC by using a ramp signal of much less than n-bit linearity and a shifted version of the same nonlinear ramp as excitation. The performance of the algorithm is comparable to that of the traditional method which uses (n + 3)-bits or a decade more linear input signals. Complete algorithm description, extensive simulation results and experimental results obtained from using a production tester on commercially available ICs are presented to validate the potential of this algorithm.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Parthasarathy, K. L., Jin, L., Chen, D., and Geiger, R. L. 2002a. A modified histogram approach for accurate self-characterization of analog-to-digital converters. In Proceedings of the 2002 IEEE International Symposium on Circuits and Systems, vol. 2. IEEE Computer Society Press, Los Alamitos, Calif., pp. 376--379.
 
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Parthasarathy, K. L., Jin, L., Kuyel, T., Price, D., Chen, D., and Geiger, R. L. 2003. Experimental evaluation and validation of a BIST algorithm for characterization of A/D converter performance. In Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, vol. 5. IEEE Computer Society Press, Los Alamitos, Calif., pp. 537--540.
 
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Collaborative Colleagues:
Kumar Parthasarathy: colleagues
Turker Kuyel: colleagues
Dana Price: colleagues
Le Jin: colleagues
Degang Chen: colleagues
Randall Geiger: colleagues

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