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The Gamma network: A multiprocessor interconnection network with redundant paths
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Source International Symposium on Computer Architecture archive
Proceedings of the 9th annual symposium on Computer Architecture table of contents
Austin, Texas, United States
Pages: 73 - 80  
Year of Publication: 1982
Also published in ...
Authors
D. S. Parker  UCLA Computer Science Department, University of California, Los Angeles, CA
C. S. Raghavendra  UCLA Computer Science Department, University of California, Los Angeles, CA
Sponsors
IEEE-CS : Computer Society
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
Bibliometrics
Downloads (6 Weeks): 4,   Downloads (12 Months): 14,   Citation Count: 14
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ABSTRACT

The Gamma network is an interconnection network connecting N&equil;2" inputs to N outputs. It consists of log2N stages with N switches per stage, each of which is a 3 input, 3 output crossbar. The stages are linked via “power of two” and identity connections in such a way that redundant paths exist between the input and output terminals. In this network, a path from a source to a destination may be represented using one of the redundant forms of the difference between the source and destination numbers. The redundancy in paths may thus be studied using the theory of redundant number systems. Results are obtained on the distribution of paths connecting inputs to outputs, and the permuting capabilities of the Gamma network. Switch settings for certain frequently used permutations and control mechanisms are also considered in this paper. This network has an interesting application in solving tridiagonal systems using the odd-even elimination algorithm.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
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2
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D.C. Opferman, N.T. Tsao-Wu, "On a Class of Rearrangeable Switching Networks", Bell Syst. Tech. Jour., Vol. 50, May-June 1971, pp.1579-1618.
 
11
D.S. Parker, "Notes on Shuffle/Exchange-Type Switching Networks", IEEE Trans. Comp., Vol. C-29, March 1980, pp.213-222.
 
12
D.S. Parker, C.S. Raghavendra, "The Gamma Network", in preparation.
 
13
M.C. Pease, "The Indirect Binary n-Cube Microprocessor Array", IEEE Trans. Comp., Vol. C-26, May 1977, pp.458-473.
 
14
H.J. Siegel, "Interconnection Networks for SIMD Machines", Computer, Vol. 12, June 1979, pp.57-65.
 
15
S.D. Smith, H.J. Siegel, R.J. McMillen, G.B. Adams, "Use of the Augmented Data Manipulator Multistage Network for SIMD Machines," Proc. 1980 International Conf. on Parallel Processing, pp.75-78.
 
16
H.S. Stone, "Parallel Processing with the Perfect Shuffle", IEEE Trans. Comp., Vol. C-20, Feb 1971, pp.153-161.

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