| Modifying Min-Cut for Hardware and Software Functional Partitioning |
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International Conference on Hardware Software Codesign
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Proceedings of the 5th International Workshop on Hardware/Software Co-Design
table of contents
Page: 43
Year of Publication: 1997
ISBN:0-8186-7895-X
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Author
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Frank Vahid
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Department of Computer Science, University of California, Riverside, CA
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IEEE Computer Society
Washington, DC, USA
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Downloads (6 Weeks): 1, Downloads (12 Months): 16, Citation Count: 13
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ABSTRACT
The Kernighan/Lin heuristic, also known as min-cut, has been extended very successfully for circuit partitioning over several decades. Those extensions customized the heuristic and its associated data structure to rapidly compute the minimum-cut metric required during circuit partitioning; thus, those extensions are not applicable to problems requiring other metrics. In this paper, we extend the heuristic for functional partitioning in a manner applicable to the codesign problem of hardware/software partitioning as well as to hardware/hardware partitioning. The extension customizes the heuristic and data structure to rapidly compute execution-time and communication metrics, crucial to hardware and software partitioning, and leads to near-linear time-complexity and excellent results. Our experiments demonstrate extremely fast execution times (just a few seconds) with results matched only by the much slower simulated annealing heuristic, meaning that the extended Kernighan/Lin heuristic will likely prove hard to beat for hardware and software functional partitioning.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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[12] B. Kernighan and S. Lin, "An efficient heuristic procedure for partitioning graphs," Bell System Technical Journal, February 1970.
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[20] B. Krishnamurthy, "An improved min-cut algorithm for partitioning VLSI networks," IEEE Transactions on Computers , May 1984.
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CITED BY 13
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M. L. López-Vallejo , J. Grajal , J. C. López, Constraint-driven system partitioning, Proceedings of the conference on Design, automation and test in Europe, p.411-416, March 27-30, 2000, Paris, France
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Thomas Hollstein , Jürgen Becker , Andreas Kirschbaum , Manfred Glesner, HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systems, Proceedings of the 6th international workshop on Hardware/software codesign, p.29-33, March 15-18, 1998, Seattle, Washington, United States
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Luc Bianco , Michel Auguin , Guy Gogniat , Alain Pegatoquet, A path analysis based partitioning for time constrained embedded systems, Proceedings of the 6th international workshop on Hardware/software codesign, p.85-89, March 15-18, 1998, Seattle, Washington, United States
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