ACM Home Page
Please provide us with feedback. Feedback
Architecture Synthesis and Partitioning of Real-Time Systems: A Comparison of Three Heuristic Search Strategies
Full text PdfPdf (771 KB)
Source International Conference on Hardware Software Codesign archive
Proceedings of the 5th International Workshop on Hardware/Software Co-Design table of contents
Page: 161  
Year of Publication: 1997
ISBN:0-8186-7895-X
Author
Jakob Axelsson  Dept. of Computer and Information Science, Linköping University, S-581 83 Linköping, Sweden
Sponsors
SIGSOFT: ACM Special Interest Group on Software Engineering
SIGDA: ACM Special Interest Group on Design Automation
Publisher
IEEE Computer Society  Washington, DC, USA
Bibliometrics
Downloads (6 Weeks): 5,   Downloads (12 Months): 14,   Citation Count: 7
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Review this Article  

ABSTRACT

This paper studies the problem of automatically selecting a suitable system architecture for implementing a real-time application. Given a library of hardware components, it is shown how an architecture can be synthesized with the goal of fulfilling the real-time constraints stated in the system's specification. In case the selected architecture contains several processing units, the specification is partitioned by assigning tasks to these. The use of three heuristic search techniques is investigated: genetic algorithms, simulated annealing, and tabu search; and it is described how these can be adapted to the architecture synthesis problem. It is concluded that tabu search is the most promising technique, but that simulated annealing is also applicable.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
[1] J. Axelsson. Schedulability-driven partitioning of heterogeneous real-time systems. Licentiate Thesis No. 517, Linköping University, 1995.
 
2
 
3
[3] J. Axelsson. Three search strategies for architecture synthesis and partitioning of real-time systems. Technical Report LiTH-IDA-R-96-32, Dept. of Computer and Information Science, Linköping University, 1996. (Available from http://www.ida.liu.se/publications/techrep/)
 
4
[4] K. Buchenrieder and A. Pyttel. System zur wissensbasierten Konfigurierung von Leiterplatten. CADS, 92(1): 52-59, 1992.
 
5
[5] P. Eles, Z. Peng, K. Kuchcinski, and A. Doboli. System level hardware/software partitioning based on simulated annealing and tabu search. To appear in Design Automation for Embedded Systems, 1997.
 
6
 
7
 
8
 
9
[9] S. Kirkpatrick, C. D. Gelatt, Jr., and M. P Vecchi. Optimization by simulated annealing. Science, 220(4598): 671-680, May 1983.
 
10
 
11
[11] S. Narayan and D. D. Gajski. Area and performance estimation from system-level specification. Technical Report ICS-92-16, University of California, Irvine, 1992.
 
12
[12] S. Prakash and A. C. Parker. SOS: Synthesis of application-specific heterogeneous multiprocessor systems. Journal of Parallel and Distributed Computing, 16: 338-351, 1992.
 
13

CITED BY  7