| Address space virtualization in reconfigurable computers |
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ACM Annual Computer Science Conference
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Proceedings of the 17th conference on ACM Annual Computer Science Conference
table of contents
Louisville, Kentucky
Pages: 269 - 277
Year of Publication: 1989
ISBN:0-89791-299-3
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Author
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D. A. Cañas
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Dept. of Mathematics and Computer Science, Wake Forest University, Winston-Salem, NC
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Downloads (6 Weeks): 0, Downloads (12 Months): 15, Citation Count: 0
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ABSTRACT
Operating Systems virtualize the execution environment of a task by managing the available resources of the system. On traditional architectures a task executes on a static environment, i.e. every instant of a task will be carried upon a fixed set of physical resources. In reconfigurable computers the availability of resources and thus the physical environment upon which a task executes may vary for different executions of a task as well as during the execution of the task. The execution of a task must be independent of configuration. This paper discusses the virtualization of the address space of a task executing in a reconfigurable environment.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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BRO82
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Browne J.C., Lipovski G.J., "Reconfigurable Network Architectured Computer Systems: An Environment for Parallel Computing", Dept. of Computer Sciences, The University of Texas at Austin, 1982.
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CAN83
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Cafias D.A., "Operating Systems for Reconfigurable Network Architectured Systems: The Node Kernel", Ph.D. Dissertation, Dept. of Computer Sciences, The University of Texas at Austin, May 1983.
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DeG80
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DeGroot D., Hunt W.A.,"A Solution to the Paging Problem", Technical Report TRAC- 18, Dept. of Computer Sciences, The University of Texas at Austin, 1980.
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DeG81
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DeGroot D., Hunt W. A. Browne J. C, "Virtual Memory management for Network Architectured tured Computers", Dept. of computer Sciences, The University of Texas at Austin, 1981.
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DES83
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Desphante S., Cafias D. Sejnowsi M.C., "Synchronization and paging in TRAC", Dept. of The University The University of Texas at 1981.
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KAP80
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Kapur R., Premkumar U. Lipovski G,.J. "Organization of th TARC processor- Memory Subsystem", in proceeding NCC, pages 623-629, ACM 1980.
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LIP79
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Lipov ski G.J, "The artchitecture Banyan Switch for Tarc technical Report TRAC-7, dept. of computer Sciences, The University Texazs Austin, 1979.
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PRE79
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Premkumar U.V., Kapur R, Liposki G.J, "Interprocess the Texas Reconfigurable puter", in Proceedings national Conference Computers, pages 52-62, IEEE 1979.
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SEJ80
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Sejnowski M. C., Upchurch Lipovski G.J., "An overview in Texas Reconfigurable computer in Proceedings NCC, paged 631-641 ACM, 1980.
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