A functional model of clocked microarchitectures

ABSTRACT

Models for the simulation of computer systems at the microarchitectural level are widely used to assist in design analysis and verification, and the development of microcode. The general model we describe here represents the behaviour of a clocked microarchitecture through the application of functions to component states and signal values. The operational semantics of the model are based partly on data flow and partly on graph reduction, allowing use to be made of the concept of 'lazy' evaluation to aid efficient simulation.

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INDEX TERMS

Primary Classification:
  B. Hardware
  B.1 CONTROL STRUCTURES AND MICROPROGRAMMING
      B.1.4 Microprogram Design Aids
          Subjects: Verification**

Additional Classification:
  B. Hardware
  B.1 CONTROL STRUCTURES AND MICROPROGRAMMING
      B.1.2 Control Structure Performance Analysis and Design Aids
          Subjects: Simulation**

  F. Theory of Computation
  F.3 LOGICS AND MEANINGS OF PROGRAMS
      F.3.2 Semantics of Programming Languages
          Subjects: Operational semantics

General Terms:
Design, Performance