| Initializability analysis of synchronous sequential circuits |
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ACM Transactions on Design Automation of Electronic Systems (TODAES)
archive
Volume 7 , Issue 2 (April 2002)
table of contents
Pages: 249 - 264
Year of Publication: 2002
ISSN:1084-4309
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Authors
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F. Corno
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Politecnico di Torino, Torino, Italy
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P. Prinetto
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Politecnico di Torino, Torino, Italy
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M. Rebaudengo
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Politecnico di Torino, Torino, Italy
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M. Sonza Reorda
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Politecnico di Torino, Torino, Italy
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G. Squillero
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Politecnico di Torino, Torino, Italy
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Downloads (6 Weeks): 0, Downloads (12 Months): 23, Citation Count: 0
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ABSTRACT
This article addresses the problem of initializing synchronous sequential circuits, that is, of generating the shortest sequence able to drive the circuit to a known state, regardless of the initial state. Logic initialization is considered, being the only one compatible with current commercial tools. A hybrid Genetic Algorithm is proposed, which combines general ideas from evolutionary computation with specific techniques, well suited to the addressed problem. For the first time, experimental results provide data about the complete set of ISCAS'89 circuits, and show that, despite the inherent algorithm incompleteness, the method is capable of finding the optimum result for the considered circuits. A prototypical tool implementing the algorithm found better results than previous methods.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Brglez, F., Bryan, D., and Kozminski, K. 1998. Combinational profiles of sequential benchmark circuits. In Proceedings of the IEEE International Symposium on Circuits And Systems, 1929--1934.
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Pixley, C., Jeong, S., and Hatchel, G. 1994. Exact calculation of synchronization sequences based on binary decision diagrams. IEEE Trans. Comput. Aided. Des. 13, 1024--1034.
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June-Kyung Rho , Fabio Somenzi , Carl Pixley, Minimum length synchronizing sequences of finite state machine, Proceedings of the 30th international conference on Design automation, p.463-468, June 14-18, 1993, Dallas, Texas, United States
[doi> 10.1145/157485.164978]
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