| Parallel inverse QR decomposition |
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ACM Southeast Regional Conference
archive
Proceedings of the 30th annual Southeast regional conference
table of contents
Raleigh, North Carolina
SESSION: Session 3C: Algorithms for parallel machines
table of contents
Pages: 85 - 92
Year of Publication: 1992
ISBN:0-89791-506-2
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Downloads (6 Weeks): 3, Downloads (12 Months): 22, Citation Count: 0
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ABSTRACT
This paper describes an algorithm and an associated architecture for the parallel implementation of the least squares problem using the inverse QR decomposition. We developed the architecture as a part of our research on the parallel implementation of multidimensional signal processing algorithms. In this paper, we show that this architecture can also be used to provide a high performance implementation of the least squares problem.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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A. Bjorck, Least Square Methods, pp. 465-653. North-Holland, Amsterdam, 1989.
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G. J. Bierman, Factorization Methods for Discrete Sequential Estimation. New York: Academic Press, 1977.
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J. Spelser and C. V. Loan, "Besmforming Algorithms using the generalized SVD," in Real- Time Signal proceHing VII, SPIE Peso., 1984.
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J. M. Cioffi and T. Kallath, "Fast RLS transversal filters for adaptive filtering," IEEE 2Vans. on Acoua., Speech, and signal Proc.,, voL ASSP-32, pp. 304-337, 1984.
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G. Golub and C. V. Loan, Matriz Computations. New York: Johns Hopkins Press, 1983.
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G. H. Golub, Matris Computations and Statistical Calculations, pp. 365-395. Academic Press, New York, 1967.
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C. T. Pan and R. J. Plemmons, "Least squares modifications with inverse factorisations: Parallel implications, m 3. Comp. and Appi. Math., vol. 27, pp. 109-127, 1989.
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Hongyu Xu, BDFA-A Block Data Flow Architecture for Real- Time Signal Proceuing and Matriz Operatiom, PhD thesis, North Carolina State University, 1991.
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Jae Gil Jeong, High Performance Multiprocessot Architecture for Digital Signal Processing, PhD thesis, North Carolina State University, 1991.
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H. Xu and W. E. Alexander, UA high performance architecture for N-D digtial signal processing and matrix operstins", Proceeding of the International Symposium on Circuits and Systems, 1992.
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