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ABSTRACT
In this paper, we will study the construction of a Steiner routing tree for a given net with the objective of minimizing the delay of the routing tree. Previous researches adopt Elmore delay model to compute delay. However, with the advancement of IC technology, a more accurate delay model is required. Therefore, in this paper, we will use two-pole delay model to compute the cost function of a Steiner tree. Moreover, we propose a new algorithm to construct the Steiner tree. Our algorithm takes into consideration the net topology, the total wire length and the longest path from the source to sink. Experimental results show that our algorithm is very effective and efficient as compared to [8].
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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M. J. Alexander, G. Robins, "New Performance-Driven FPGA Routing Algorithm", ACM/IEEE Design Automation Conf. , pp. 652-657, 1994.
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C. J. Alpert, T. C. Hu, J. H. Huang, A. B. Kahng, D. Karger, "Prim-Dijkstra Tradeoffs for Improved Performance-Driven Routing Tree Design", IEEE Trans. CAD , vol. 14, no. 7, pp. 890-896, 1995.
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H. Mitsubayashi, A. Takahashi, Y. Kajitani, "Cost-Radius Balanced Spanning/Steiner Tree", IEEE Asia Pacific Conference on Circuits and Systems , pp. 377-380, 1996.
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J. Oh, I. Pyo, M. Pedrame, "Constructing Minimal Spanning Trees with Lower and Upper Bounded Path Delays," ISCAS'96 , vol. 4, pp. 416-419, 1996.
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8
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K. D. Boese, A. B. Kahng, B. A. McCoy, G. Robins, "Near- Optimal Critical Sink Routing Tree Constructions", IEEE Trans. CAD , vol. 14, no. 12, pp. 1417-1436, 1995.
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Kenneth D. Boese , Andrew B. Kahng , Bernard A. McCoy , Gabriel Robins, Rectilinear Steiner trees with minimum Elmore delay, Proceedings of the 31st annual conference on Design automation, p.381-386, June 06-10, 1994, San Diego, California, United States
[doi> 10.1145/196244.196428]
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W. C. Elmore, "The Transient Response of Damped Linear Networks with Particular Regard to Wideband Amplifiers", Journal of Applied Physics 19 , pp. 55-63, 1948.
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11
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A. B. Kahng, S. Muddu, "Two-pole Analysis of Interconnection Trees", IEEE MCMC Conf., pp.105-110, 1995.
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A. B. Kahng, S. Muddu, "An Analytical Delay ModelforRLC Interconnections", ISCAS'96, vol. 4, pp. 237-240, 1996
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13
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Youxin Gao, D. F. Wong, "Wire-Sizing Optimization with Induztance Consideration Using Transmission-Line Model", IEEE Trans. CAD, vol. 18, no. 12, pp. 1759-1767, 1999.
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M. Hanan, "On Steiner's Problem with Rectilinear Distance", SIAM J. Appl. Math., vol. 14, pp. 255-265, 1996.
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H. Hou, J. Hu, S. S. Sapatnekar, "Non-Hanan Routing", IEEE Trans. CAD, vol. 18, no. 4, pp. 436-444, 1999.
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18
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A. B. Kahng, G. Robins, "On Optimal Interconnections for VLSI", Kluwer Academic Publishers, Boston, MA, 1995.
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