A static power estimation methodolodgy for IP-based design

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A static power estimation methodolodgy for IP-based design

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Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe table of contents

Munich, Germany

Pages: 280 - 289

Year of Publication: 2001

ISBN:0-7695-0993-2

Authors

X. Liu	Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan
C. Papaefthymiou	Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, Michigan

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
ECSI :
IEEE-CS\DATC : IEEE Computer Society
RAS : RAS
EDAC : Electronic Design Automation Consortium
IEEE-CS\TTTC : Test Technology Technical Council
IFIP WG 10.5 : IFIP WG 10.5
EDAA : European Design Automation Association

Publisher

IEEE Press Piscataway, NJ, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 10, Citation Count: 5

Additional Information:

references cited by index terms collaborative colleagues peer to peer

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	2	Guiseppe Bernacchia , Marios C. Papaefthymiou, Analytical macromodeling for high-level power estimation, Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, p.280-283, November 07-11, 1999, San Jose, California, United States
	3	Zhanping Chen , Kaushik Roy, A power macromodeling technique based on power sensitivity, Proceedings of the 35th annual conference on Design automation, p.678-683, June 15-19, 1998, San Francisco, California, United States [doi>10.1145/277044.277216]
	4	Zhanping Chen , Kaushik Roy , Tan-Li Chou, Power sensitivity—a new method to estimate power dissipation considering uncertain specifications of primary inputs, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.40-44, November 09-13, 1997, San Jose, California, United States
	5	Subodh Gupta , Farid N. Najm, Power macromodeling for high level power estimation, Proceedings of the 34th annual conference on Design automation, p.365-370, June 09-13, 1997, Anaheim, California, United States [doi>10.1145/266021.266171]
	6	Subodh Gupta , Farid N. Najm, Analytical Model for High Level Power Modeling of Combinational and Sequential Circuits, Proceedings of the IEEE Alessandro Volta Memorial Workshop on Low-Power Design, p.164, March 04-05, 1999
	7	Paul Landman, High-level power estimation, Proceedings of the 1996 international symposium on Low power electronics and design, p.29-35, August 12-14, 1996, Monterey, California, United States
	8	X. Liu and M. C. Papaefthymiou. A macromodeling sequence generator based on Markov chains. University of Michigan, Department of EECS, Technical Report, Sept. 2000.
	9	Farid N. Najm, Transition density, a stochastic measure of activity in digital circuits, Proceedings of the 28th conference on ACM/IEEE design automation, p.644-649, June 17-22, 1991, San Francisco, California, United States [doi>10.1145/127601.127744]
	10	Farid N. Najm, A survey of power estimation techniques in VLSI circuits, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.2 n.4, p.446-455, Dec. 1994 [doi>10.1109/92.335013]
	11	National Bureau of Standards. Data Encryption Standard. Federal Information Processing Standard (FIPS), Publication No. 46, Jan. 1977.
	12	Jan M. Rabaey, Digital integrated circuits: a design perspective, Prentice-Hall, Inc., Upper Saddle River, NJ, 1996

CITED BY 5

	Xun Liu , Marios C. Papaefthymiou, HyPE: hybrid power estimation for IP-based programmable systems, Proceedings of the 2003 conference on Asia South Pacific design automation, January 21-24, 2003, Kitakyushu, Japan
	Brett H. Meyer , Joshua J. Pieper , JoAnn M. Paul , Jeffrey E. Nelson , Sean M. Pieper , Anthony G. Rowe, Power-Performance Simulation and Design Strategies for Single-Chip Heterogeneous Multiprocessors, IEEE Transactions on Computers, v.54 n.6, p.684-697, June 2005
	Yaseer A. Durrani , Teresa Riesgo, Power estimation technique for DSP architectures, Digital Signal Processing, v.19 n.2, p.213-219, March, 2009
	Alex K. Jones , Raymond Hoare , Dara Kusic , Gayatri Mehta , Josh Fazekas , John Foster, Reducing power while increasing performance with supercisc, ACM Transactions on Embedded Computing Systems (TECS), v.5 n.3, p.658-686, August 2006
	Swapna Dontharaju , Shenchih Tung , James T. Cain , Leonid Mats , Marlin H. Mickle , Alex K. Jones, A design automation and power estimation flow for RFID systems, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.14 n.1, p.1-31, January 2009