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An adaptive on-chip voltage regulation technique for low-power applications
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Source International Symposium on Low Power Electronics and Design archive
Proceedings of the 2000 international symposium on Low power electronics and design table of contents
Rapallo, Italy
Pages: 20 - 24  
Year of Publication: 2000
ISBN:1-58113-190-9
Authors
Nicola Dragone  Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA and STMicroelectronics
Akshay Aggarwal  Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA
L. Richard Carley  Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA
Sponsors
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 1,   Downloads (12 Months): 22,   Citation Count: 2
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ABSTRACT

In this paper we present a completely on-chip voltage regulation technique which promises to adjust the degree of voltage regulation in a digital logic chip in the face of process induced delay variations so as to minimize energy dissipation while always guaranteeing the target operatingfrequency. For this purpose the delay of a critical path replica of the circuit being regulated is constantly compared with the target delay provide the regulator with the information needed to select the optimum voltage levels. The proposed solution is even more attractive in that no external components are required. Based on this scheme, a completely on-chip voltage regulator has been fabricated in a commercial 0.5&mgr;m CMOS process and used to generate the inner rail voltages for a DSP multiplier-accumulator (MAC) implemented in mixed swing QuadRail. Measured results indicate that the voltages generated by the regulator offer a very high degree of load regulation thus verifying the fast response time of the on-chip output buffer.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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R.K.Krishnamurthy, H. Schmit, and L.R.Carley, "A Low-power 16-bit MAC using Series-Regulated Mixed-Swing Techniques,' CICC, May 1998.
 
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L.R.Carley, "QuadRail: A Design Methodology for Ultra Low Power Integrated Circuits,' Proc. IEEE IWLPD, April 1994.


Collaborative Colleagues:
Nicola Dragone: colleagues
Akshay Aggarwal: colleagues
L. Richard Carley: colleagues

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