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Pseudo pin assignment with crosstalk noise control
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Source International Symposium on Physical Design archive
Proceedings of the 2000 international symposium on Physical design table of contents
San Diego, California, United States
Pages: 41 - 47  
Year of Publication: 2000
ISBN:1-58113-191-7
Authors
Chin-Chih Chang  UCLA Computer Science Department, Los Angeles, CA
Jason Cong  UCLA Computer Science Department, Los Angeles, CA
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 3,   Downloads (12 Months): 7,   Citation Count: 6
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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H. H. Chen and C. K. Wong. Wiring and crosstalk avoidance in multi-chip module design. In Proceedings of the IEEE 1992 Custom Integrated Circuits Conference, pages 28.6.1-28.6.4, 1992.
 
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J. Cong. Pin assignment with global routing for general cell designs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 10(11):1401-1412, November 1991.
 
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T. Gao and C. L. Liu. Minimum crosstalk channel routing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 15(5):465-474, May 1996.
 
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W.-C. Kao and T.-M. Parng. Cross point assignment with global rerouting for general-architecture designs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 14(3):337-348, March 1995.
 
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H. Kawaguchi and T. Sakurai. Delay and noise formulas for capacitively coupled distributed RC lines. In Proc. Asia South Pacific Design Automation Conf., pages 35-43, 1998.
 
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D. P. Lapotin. Early assessment of design, packaging and technology tradeoffs. International Journal of High Speed Electronics, 2(4):209-233, 1991.
 
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J. K. Ousterhout. Corner stitching: a data-structuring technique for VLSI layout tools. IEEE Transactions on Computer-Aided Design, CAD-3(1):87-99, 1984.
 
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T. Sakurai. Closed-form expressions for interconnection delay, coupling, and crosstalk in VLSIs. IEEE Trans. on Electron Devices, 40:118-124, 1993.
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A. Vittal and M. Marek-Sadowska. Crosstalk reduction for VLSI. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 16(3):290-298, March 1997.
 
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Collaborative Colleagues:
Chin-Chih Chang: colleagues
Jason Cong: colleagues

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