Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	KAUTZ, W. H. Testing for faults in combinational cellular logic arrays. Proc. Eighth Annual Syrup. on Switching and Automata Theory, 1967, pp. 161-174 (IEEE Pub. 16C56, 1967).
	2	ELSPAS, B., ET AL. Properties of cellular arrays for logic and storage. Scientific Rep. No. 3, SRI Proj. No. 5876, Stanford Res. Inst., Menlo Park, Calif., 1967 {Contract AF19(628)-5828, Air Force Cambridge Res. Labs., Bedford, Mass.}.
	3	MINNICK, R. C., ET AL. Cellular arrays for logic and storage. Final Rep., SRI Project 5087, Stanford Res. Inst., Menlo Park, Calif., 1966 {Contract AF19(628)-4233, Air Force Cambridge Res. Labs., Bedford, Mass.}.
	4	WAHLSTROM, S. E. Programmable logic arrays--cheaper by the millions. Electronics 40 (Dec. 11, 1967), 90-95.
	5	KAUTZ, W. l~l. Cellular-logic-in memory arrays. IEEE Trans. C-18, 8 (1969), 719-727.
	6	KAuTz, W. H., LEWTT, K. N., AND WAKSMAN, A. Cellular interconnection arrays. IEEE Trans. C-17, 5 (1968), 443-451.
	7	LEVITT, K. N., AND KAUTZ, W. H. Cellular arrays for the parallel implementation of binary error-correcting codes. IEEE Trans. IT-15, 5 (1969), 597-607.
	8	KAUTZ, W.H. A cellular threshold array. IEEE Trans. EC-16 (1967), 680-682.
	9	Marshall C. Pease, Matrix Inversion Using Parallel Processing, Journal of the ACM (JACM), v.14 n.4, p.757-764, Oct. 1967  [doi>10.1145/321420.321434]
	10	Marshall C. Pease, Inversion of Matrices by Partitioning, Journal of the ACM (JACM), v.16 n.2, p.302-314, April 1969  [doi>10.1145/321510.321522]
	11	KAUTZ, W. H., PEASE, M. C., AND GREEN, M.W. Cellular logic-in-memory arrays. Final Rep., Pt. 1, Contract Nonr--4833(00), Stanford Res. Inst., Menlo Park, Calif., 1970, Chaps. 3, 4, 8, 9.
	12	Marshall C. Pease, An Adaptation of the Fast Fourier Transform for Parallel Processing, Journal of the ACM (JACM), v.15 n.2, p.252-264, April 1968  [doi>10.1145/321450.321457]
	13	STONE, H.S. A logic-in-memory computer. IEEE Trans C-19, 1 (1970), 73-78.
	14	STONE, H.S. Associative processing for general purpose computers through the use of modified memories. Proc. AFIPS 1968 FJCC, Vol. 33, Pt. 2, AFIPS Press, Montvale, N.J., pp. 949-955.
	15	LEVITT, K. N., KAUTZ, W. H., AND TURNER, J. Cellular arrays for the solution of graph problems (to appear).

• Data structures for quadtree approximation and compression Communications of the ACM   28, 9
  Hanan Samet
  
  
• A hierarchical single-key-lock access control using the Chinese remainder theorem Proceedings of the 1992 ACM/SIGAPP Symposium on Applied computing
  Kim S. Lee ,  Huizhu Lu ,  D. D. Fisher
  
  
• The GemStone object database management system Communications of the ACM   34, 10
  Paul Butterworth ,  Allen Otis ,  Jacob Stein
  
  
• Putting innovation to work: adoption strategies for multimedia communication systems Communications of the ACM   34, 12
  Ellen Francik ,  Susan Ehrlich Rudman ,  Donna Cooper ,  Stephen Levine
  
  
• An intelligent component database for behavioral synthesis Proceedings of the 27th ACM/IEEE Design Automation Conference on
  Gwo-Dong Chen ,  Daniel D. Gajski