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On a Computer Program for Obtaining Irreducible Representations for Two-Level Multiple Input-Output Logical Systems
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Volume 10 ,  Issue 1  (January 1963) table of contents
Pages: 48 - 77  
Year of Publication: 1963
ISSN:0004-5411
Authors
R. W. House  Battelle Memorial Institute, Columbus, Ohio
T. Rado  The Ohio State University, and Battelle Memorial Institute, Columbus, Ohio
Publisher
ACM  New York, NY, USA
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
McCvSKE, JR, E.J. Minimal sums for Boolean functions having many unspecified fund,menal products, Prec. Second Annual Snposhnn on Switching Circuit Theory and Logical Design, AIEE I"M1 General Meeting, Detroit, Mich., Oct. 17-20, I961, 10-17.
 
2
BaTEE, "T. C. Computer design of multiple-output logical networks. IRE Trans. EC-IO (Mr. 1961), 21-30.
 
3
MmSLEa, D.E. Application of Boolean algebra to switching circuit design and to error detection. IRE Trans. EC-3 (Sept. 1954), 6-12.
 
4
GHAZALA (GAZAI,), M.J. trredundant disjunctive and conjunctive forms of a BooIean function. IBM J. Res. Dev. t (Apr. 1957), 171-176.
 
5
RAPe, T. OT the presence function of Gazald. IBM J. Res. Dev. 6 (Apr. 1962).
 
6
IIovs, R. W..ND R,DO, T. A reduction lgorithm for iacompleteIy specified functions. To ppear.
 
7
Ibid.
 
8
QvlNE W.V. On cores and prime implicants of truth functions. Amer. Math. Month. 66 (Nov. 1959), 755-760.


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