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One-to-one mapping of process graphs onto a hypercube
Source International Conference on Supercomputing archive
Proceedings of the 3rd international conference on Supercomputing table of contents
Crete, Greece
Pages: 91 - 98  
Year of Publication: 1989
ISBN:0-89791-309-4
Authors
Sponsors
Computer Tech Inst. : Computer Technology Institute
SIGARCH: ACM Special Interest Group on Computer Architecture
SIAM : Society for Industrial and Applied Mathematics
AICA : Assoc Italianai de Calcolo Automatico
Publisher
ACM  New York, NY, USA
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ABSTRACT

In this paper, the problem of assigning N parallel tasks onto a hypercube with N processors is considered. Three heuristics are developed to map arbitrary process graphs, in a one-to-one fashion, onto a hypercube architecture, in order to minimize the communication cost between processors:bit-toggling (BT), bit-swapping (BS), and node-swapping (NS). The effectiveness of the methods is evaluated using a number of sample process graphs, and compared with the results obtained from simulated annealing (SA). With respect to solution quality, between the three approaches proposed, the node-swapping technique is superior.


Collaborative Colleagues:
Fikret Ercal: colleagues
P. Sadayappan: colleagues