A new algorithm for third generation circuit simulators: the one-step relaxation method

ABSTRACT

A new algorithm for third generation circuit simulators, the “ONE-STEP RELAXATION METHOD” (OSR), as well as a concrete implementation of it, the new circuit simulator ELDO, are presented. This algorithm can replace the NEWTON method used in most second generation circuit simulators. Contrary to “Timing Simulator” algorithms, OSR makes no simplifying hypotheses on weak couplings between nodes. OSR performances are close to those of the “WAVEFORM RELAXATION METHOD” (WRM) used in the recent circuit simulator RELAX. But OSR requires less memory space than the WRM and its CPU-time increases linearly with the interval of simulated time. Eldo has already been used for the accurate simulation of a 1600 MOS digital-analog converter : less than one megabyte memory size was required.

REFERENCES

• 1: G. HACHTEL and A. SANGIOVANNI-VICENTELLI " A survey of third generation simulation technique " Proc. IEEE, Vol. 69 pp. 1264-12B0 Oct. 1981.
• 2: L.N. NAGEL "SPICE 2 : a computer program to simulate semiconductor circuits" University of California, berkeley. May 19?~.
• 3: W.T. Weeks, A.3. 3iminez, G.W. Mahoney, D. Metha, H. Qassemzadeh, and T.R. Scott, "Algorithms for ASTAP-A network analysis program," IEEE Trans, circuit theory, Vol CT 20, p, 628-634, Nov. 1973.
• 4: B.R. CHAWLA, H. K. GUMMEL and P. KOZAK, "MOTIS - AMOS timing simulator" trans. IEEE, VoX. CA5-22, No 12, pp. 901-910, dec. 1975.
• 5: C. F. Chen , C-Y Lo , H. N. Nham , Prasad Subramaniam, The second generation motis mixed-mode simulator, Proceedings of the 21st conference on Design automation, p.10-17, June 25-27, 1984, Albuquerque, New Mexico, United States
• 6: E. Lelarasmee , A. Sangiovanni-Vincentelli, Relax: A new circuit for large scale MOS integrated circuits, Proceedings of the 19th conference on Design automation, p.682-687, January 1982
• 7: E. LELARASME, A.E. Rueh11, and A. SANGIOVANNI-VICENTELLI " The Waveform Relaxation method for time-domain Analysis of large scale Integrated circuits" IEEE Trans on CAD Vol. CAD-I, No.5, July 1982, pp. 131-145.
• 8: P.SENN, and B.HENNION "ELDO, un nouveau simulateur elctrique pour VLSI, suivi d'examples sur lss circuits a cspacitees commutees" Actes de la conference sur lea circuits analoglques PARIS oct 1984.
• 9: 3.WHITE and A. SANGIOVANNI-VICENTELLI "RELAX2, A New Waveform R!Imxstlon approach for the snllylts of LSI MOS circuits", Proc. 198} Internat~onnml Symposium on Circuit@ and Systems, May 198}.
• 10: O. A. Palusinski, "Expansion methods in relaxation-based circuit simulation" Proceedings of ICCD'84, pp. 498-501, New York, Oct. 84
• 11: Randal E. Bryant, Switch-Level Model and Simulator for MOS Digital Systems, California Institute of Technology, Pasadena, CA, 1983
• 12: D.E. NARD "Charge-based modeling of capacitances in MOS transistors" Ph.D. dissertation Tech. report. G 201-11, Integrated circuits Laboratory, Stanford University, CA, june 1981.
• 13: P. Yang, m.D. Epler, and P.K. Chatterjee, "An investigation of the charge conservation problem for MOSFET circuit simulation" IEEE 3. Solid-state Circuits, Vol. SC-18, pp. 128-158, Feb. 1985.

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.2 Design Aids
          Subjects: Simulation

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS

  J. Computer Applications

General Terms:
Algorithms, Design, Measurement, Performance, Theory