Reducing cache misses using hardware and software page placement

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Reducing cache misses using hardware and software page placement

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International Conference on Supercomputing archive
Proceedings of the 13th international conference on Supercomputing table of contents

Rhodes, Greece

Pages: 155 - 164

Year of Publication: 1999

ISBN:1-58113-164-X

Authors

Timothy Sherwood	Department of Computer Science and Engineering, University of California, San Diego
Brad Calder	Department of Computer Science and Engineering, University of California, San Diego
Joel Emer	Alpha Development Group, Compaq Computer Corporation

Sponsor

SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 43, Citation Count: 12

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references cited by index terms collaborative colleagues peer to peer

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 12

	Michal Marko , A. Wayne Madison, Cache conflict resolution through detection, analysis and dynamic remapping of active pages, Proceedings of the 38th annual on Southeast regional conference, April 07-08, 2000, Clemson, South Carolina
	Rakesh Kumar , Dean M. Tullsen, Compiling for instruction cache performance on a multithreaded architecture, Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture, November 18-22, 2002, Istanbul, Turkey
	Lei Jin , Hyunjin Lee , Sangyeun Cho, A flexible data to L2 cache mapping approach for future multicore processors, Proceedings of the 2006 workshop on Memory system performance and correctness, October 22-22, 2006, San Jose, California
	Carl A. Waldspurger, Memory resource management in VMware ESX server, Proceedings of the 5th symposium on Operating systems design and implementation Due to copyright restrictions we are not able to make the PDFs for this conference available for downloading , December 09-11, 2002, Boston, Massachusetts
	Carl A. Waldspurger, Memory resource management in VMware ESX server, ACM SIGOPS Operating Systems Review, v.36 n.SI, Winter 2002
	Xiao Zhang , Sandhya Dwarkadas , Kai Shen, Towards practical page coloring-based multicore cache management, Proceedings of the fourth ACM european conference on Computer systems, April 01-03, 2009, Nuremberg, Germany
	Livio Soares , David Tam , Michael Stumm, Reducing the harmful effects of last-level cache polluters with an OS-level, software-only pollute buffer, Proceedings of the 2008 41st IEEE/ACM International Symposium on Microarchitecture, p.258-269, November 08-12, 2008
	Sangyeun Cho , Lei Jin, Managing Distributed, Shared L2 Caches through OS-Level Page Allocation, Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, p.455-468, December 09-13, 2006
	Erik G. Hallnor , Steven K. Reinhardt, A fully associative software-managed cache design, ACM SIGARCH Computer Architecture News, v.28 n.2, p.107-116, May 2000
	Jayaprakash Pisharath , Alok Choudhary, An integrated approach to reducing power dissipation in memory hierarchies, Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems, October 08-11, 2002, Grenoble, France
	Reza Azimi , David K. Tam , Livio Soares , Michael Stumm, Enhancing operating system support for multicore processors by using hardware performance monitoring, ACM SIGOPS Operating Systems Review, v.43 n.2, April 2009
	Rajiv Ravindran , Michael Chu , Scott Mahlke, Compiler-managed partitioned data caches for low power, ACM SIGPLAN Notices, v.42 n.7, July 2007