Exploiting SIMD parallelism in DSP and multimedia algorithms using the AltiVec technology

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Exploiting SIMD parallelism in DSP and multimedia algorithms using the AltiVec technology

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International Conference on Supercomputing archive
Proceedings of the 13th international conference on Supercomputing table of contents

Rhodes, Greece

Pages: 11 - 20

Year of Publication: 1999

ISBN:1-58113-164-X

Authors

Huy Nguyen	Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, Texas
Lizy Kurian John	Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, Texas

Sponsor

SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 6, Downloads (12 Months): 50, Citation Count: 15

Additional Information:

references cited by index terms collaborative colleagues peer to peer

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	G. Btalock, "The BDTIMark: A Measure of DSP Execution Speed," 1997. White paper from Berkeley Design Technology, Inc. http ://www. bdti. comf articles/wtpaper, html
	2	R. Bhargava, R. Radhakrishnan, L. K. John, and B. L. Evans, "Characterization of MMX-enhanced DSP and Multimedia Applications on a General Purpose Processor," Digest of Workshop on Performance Analysis and Its Impact on Design (PAID98), Barcelona, Spain, July 1998
	3	Ravi Bhargava , Lizy K. John , Brian L. Evans , Ramesh Radhakrishnan, Evaluating MMX technology using DSP and multimedia applications, Proceedings of the 31st annual ACM/IEEE international symposium on Microarchitecture, p.37-46, November 1998, Dallas, Texas, United States
	4	W. Chen, H. J. Reekie, S. Bhave, and E. A. Lee, "Native Signal Processing on the UltraSPARC in the Ptolemy Environment, "Proceedings IEEE Asilomar Conference on Signals, Systems, and Computers, November 1996
	5	"20 Years of RISC with Lessons for the Future," Dave Ditzel, keynote speech at Micro-31, htto://www, acm.org/sigmicro/micro31/pdf/m31- ditzel.pdf
	6	S. Fuller, "Motorola's AltiVec Technology," Networking & Computing Core Technologies, Motorola Inc., Austin, Texas, http://www.~not.com/SPS/PowerPC/teksupport/tek libra~y/papers/altivec wp.pdf
	7	L. Gwennap, "Intel's MMX Speeds Multimedia," Microprocessor Report, Volume 10, Issue 3, March 5, 1996
	8	L. Gwennap, "AltiVec Vectorizes PowerPC," Microprocessor Report, Volume 12, Number 6, May 11, 1998
	9	L. Gwennap, "G4 is First PowerPC With AltiVec," Microprocessor Report, Volume 12, Number 12, November 16, 1998
	10	James H. McClellan , Ronald W. Shafer , M. A. Yoder, DSP First: A Multimedia Approach, Prentice Hall PTR, Upper Saddle River, NJ, 1997
	11	R. Steinmetz, "Data Compression in Multimedia Computing- Standards and Systems," Multimedia Systems, vol. 1, page 187-204, 1994
	12	Steven A. Tretter, Communication System Design Using DSP Algorithms: With Laboratory Experiments for the TMS320C30, Kluwer Academic Publishers, Norwell, MA, 1995
	13	"AltiVec Technology Programming Environments Manual," rev 0.2, May 1998, http.'//www,motcom/SPS/PowerPC/teksupport/tek librarv/manuals/altivec pem.pdf
	14	"AltiVec Support in MrC{pp}," rev 1.2, June 6, 1998, ht~.'//developer, apple, com/dev/toots/mpwtools/compilers/docs/altivec support,pdf
	15	Apple's AltiVec Home Page, http://developer,anple.com/hardware/altivec/
	16	Motorola's AltiVec Technology Home Page, httn.'//www,mot.com/SPS/PowerPC/AltiVec/
	17	AltiVec Emulator, htt-n " //deve l~per' app le' c ~ m/devw~ rld/T~~ ls Chest /Core Mac OS Tools/MPW }Vebsite Download s/Emulator- 1. Od4. hqx
	18	pitsTT6 Trace Generator, ht~.'//j{p, a~pp te. com/devwo rld/Development Kits/ altivec/nits TT6.sit. hqx
	19	Sun's Visual Instruction Set Home Page, http ://www. sun. com/microelectronic/vis
	20	MIPS Extension for Digital Media with 3D, MIPS Technologies inc., htt~://www.miDs.com/Documentation/isa5 tech b rf. pdf
	21	MPC750 RISC Microprocessor User's Manual, Motorola Inc., 1997

CITED BY 15

	Deepu Talla , Lizy Kurian John , Doug Burger, Bottlenecks in Multimedia Processing with SIMD Style Extensions and Architectural Enhancements, IEEE Transactions on Computers, v.52 n.8, p.1015-1031, August 2003
	Dmitry Cheresiz , Ben Juurlink , Stamatis Vassiliadis , Harry A. G. Wijshoff, The CSI multimedia architecture, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.13 n.1, p.1-13, January 2005
	Jesus Corbal , Mateo Valero , Roger Espasa, Exploiting a new level of DLP in multimedia applications, Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture, p.72-79, November 16-18, 1999, Haifa, Israel
	Lewis B. Baumstark, Jr. , Linda M. Wills, Retargeting Sequential Image-Processing Programs for Data Parallel Execution, IEEE Transactions on Software Engineering, v.31 n.2, p.116-136, February 2005
	Jesus Corbal , Roger Espasa , Mateo Valero, MOM: a matrix SIMD instruction set architecture for multimedia applications, Proceedings of the 1999 ACM/IEEE conference on Supercomputing (CDROM), p.15-es, November 14-19, 1999, Portland, Oregon, United States
	Dorit Naishlos , Marina Biberstein , Shay Ben-David , Ayal Zaks, Vectorizing for a SIMdD DSP architecture, Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems, October 30-November 01, 2003, San Jose, California, USA
	Claude Limousin , Julien Sebot , Alexis Vartanian , Nathalie Drach, Architecture optimization for multimedia application exploiting data and thread-level parallelism, Journal of Systems Architecture: the EUROMICRO Journal, v.51 n.1, p.15-27, January 2005
	Binu Mathew , Al Davis , Mike Parker, A low power architecture for embedded perception, Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems, September 22-25, 2004, Washington DC, USA
	Claude Limousin , Julien Sebot , Alexis Vartanian , Nathalie Drach-Temam, Improving 3D geometry transformations on a simultaneous multithreaded SIMD processor, Proceedings of the 15th international conference on Supercomputing, p.236-245, June 2001, Sorrento, Italy
	C. John Glossner , Michael Schulte , Stamatis Vassiliadis, A Java-enabled DSP, Embedded processor design challenges: systems, architectures, modeling, and simulation-SAMOS, Springer-Verlag New York, Inc., New York, NY, 2002
	Lieven Eeckhout , Koen De Bosschere, Quantifying behavioral differences between multimedia and general-purpose workloads, Journal of Systems Architecture: the EUROMICRO Journal, v.48 n.6-7, p.199-220, January 2003
	Dorit Nuzman , Ira Rosen , Ayal Zaks, Auto-vectorization of interleaved data for SIMD, ACM SIGPLAN Notices, v.41 n.6, June 2006
	Nathan T. Slingerland , Alan Jay Smith, Design and characterization of the Berkeley multimedia workload, Multimedia Systems, v.8 n.4, p.315-327, July 2002
	Nathan Slingerland , Alan Jay Smith, Measuring the Performance of Multimedia Instruction Sets, IEEE Transactions on Computers, v.51 n.11, p.1317-1332, November 2002
	Antonio Gentile , Sam Sander , Linda Wills , Scott Wills, The impact of grain size on the efficiency of embedded SIMD image processing architectures, Journal of Parallel and Distributed Computing, v.64 n.11, p.1318-1327, November 2004