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Aesthetic routing for transistor schematics
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Source International Conference on Computer Aided Design archive
Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design table of contents
Santa Clara, California, United States
Pages: 35 - 38  
Year of Publication: 1992
ISBN:0-89791-540-2
Authors
Tsung D. Lee  Computer Science Department, University of California at Los Angeles, Los Angeles, California
Lawrence P. McNamee  Computer Science Department, University of California at Los Angeles, Los Angeles, California
Sponsors
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
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Downloads (6 Weeks): 10,   Downloads (12 Months): 14,   Citation Count: 0
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
M. Burstein and R. Pelavin, "Hierarchical Wire Routing," IEEE Trans. on Computer-aided Design, CAD-2, pp. 223-234, 1983
 
2
M. Garey and D. Johnson, Computers and intractability, Bell Telephone Lab., Inc., 1979
 
3
D. Heinbuch, CMOS3 Cell Library, Addison- Wesley Publishing Co., 1988
 
4
A. Kahng, G. Robins, "iterative Steiner Tree Routing," the Proc. of ICCAD, Nov. 1990
 
5
T.D. Lee and L.P. McNamee, "A Transistor Schematic Placement Expert," the Proc. of Int'l Conf. of industrial and Engineering Applications of Artificial Intelligence and Expert Systems, June 1991
 
6
H. Levy, and D. Low, "A New Algorithm for Finding Small Cycle Cutsets," IBM Tech. Rep. IBM- G320-2721, june 1983
7

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