Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	ACT Family Field Programmable Gate Array DATABOOK.
	2	Surendra Burman, Chandar Kamalanathan, and Naveed Sherwani. "New Channel Segmentation and Associated Routing Algorithm for High Performance FPGAs", The Technical Report TR- 9z/ s.
	3	A. E1 Carnal. et. al.. "An Architecture for Electrically Configurable Gate Arrays". IEEE JSSC. Vol. 24, No. 2, April 1989, pp. 394-398.
	4	Akihiro Hashimoto , James Stevens, Wire routing by optimizing channel assignment within large apertures, Proceedings of the 8th workshop on Design automation, p.155-169, June 28-30, 1971, Atlantic City, New Jersey, United States  [doi>10.1145/800158.805069]
	5	H. Hsieh, et. al. "A 9000-Gate User-Programmable Gate Array." Proceedings of 1988 CICC, May 1988. pp. 15.3.1-15.3.7.
	6	Jonathan Greene , Vwani Roychowdhury , Sinan Kaptanoglu , Abbas El Gamal, Segmented channel routing, Proceedings of the 27th ACM/IEEE conference on Design automation, p.567-572, June 24-27, 1990, Orlando, Florida, United States  [doi>10.1145/123186.123405]
	7	Ren-Song Tsay~ "Exact Zero Skew". Proceedings o/the ICCAD-91, pp. 336-339, 1991.
	8	Stephen Brown, jonathan Rose and Zvonko G. Vranesic, "A Detailed Router for Field- Programmable Gate Arrays", the IEEE Transactions on Computer Aided Design", Vol. II, pp. 620-628, May 1992.

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