Subwavelength optical lithography

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

Subwavelength optical lithography: challenges and impact on physical design

Full text

Pdf (1.30 MB)

Source

International Symposium on Physical Design archive
Proceedings of the 1999 international symposium on Physical design table of contents

Monterey, California, United States

Pages: 112 - 119

Year of Publication: 1999

ISBN:1-58113-089-9

Authors

A. B. Kahng	UCLA Department of Computer Science, Los Angela, CA
Y. C. Pati	Numerical Technologies, Inc., Santa Clara, CA

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 7, Downloads (12 Months): 52, Citation Count: 11

Additional Information:

references cited by index terms collaborative colleagues peer to peer

Tools and Actions:	Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/299996.300035 What is a DOI?

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	L. E. CAMILLETTI, Implementation of CUP-based Design Rules and Patterning Practices, in 1995 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, 1995, pp. 2-4.
	2	A. CHATqrER:}EE, I. ALl, K. 3OYN~R, D. MZRCER, ZT AL., Integration of Unit Processes in a Shallow Trench Isolation Nodule for a 0.~5 tim Complementary Metal-Oxide Semiconductor Technology, Journal of Vacuum Science and Technology B, 15 (1997), pp. 1936-1942.
	3	J. F. CHEN, T. LAIDIG, K. E. WAMPLER, AND R. CALDwELL, Practical Method for Full-Chip Optical Proximity Correction, in SPIE, vol. 3051, 1997, pp. 790--803.
	4	V. K. R. CHILUVURI AND I. KOREN, ~,@~out-Sy~tth~sts Tecltniques turing, 8 (1995), pp. 178-187.
	5	D. DOLAINSKY AND W. MAURBR, Applicgtion of a Simple Resist Model to Fast Optical Prozimiizl Correction, in SPIE, vol, 3051, 1997, pp. 774-780.
	6	G. (}ALAN, F. LALANNE, M. TISSIER, AND M. BELLEVILLE, Alternoting phase shift generation tar complex circuit desig,~, in SPIE 16th Annual BACUS Symposium on Photomask Technology, vol. SPIE 2884, 1996, pp. 508-519.
	7	P. GILBERT ET AL., A High Performance 1.5V, 0.10urn Gate Length CMOS Technologll with Scaled Copper Metalization, IEDM 1998, pp. 1013-1016.
	8	W. B. GLENDINNIN(} AND J. N. HELBERT, Handbook of VLSI Microlithographll: Principles, Technoiogll, and Applications, Noyes Publications, 1991.
	9	L. GWENNAP, IC Vendors Prepare for 0.1~5-Micron Leap, Microprocessor Report, September 16 (1996), pp. 11-15.
	10	F. O. HADLOCK, Finding a Maximum Cut of a Planar Graph in Polllnomial Time, SIAM J. Computing, 4 (1975), pp. 221-225.
	11	A. B. Kahng , S. Muddu , E. Sarto , R. Sharma, Interconnect tuning strategies for high-performance ICs, Proceedings of the conference on Design, automation and test in Europe, p.471-478, February 23-26, 1998, Le Palais des Congrés de Paris, France
	12	Andrew B. Kahng , Gabriel Robins , Anish Singh , Huijuan Wang , Alexander Zelikovsky, Filling and slotting: analysis and algorithms, Proceedings of the 1998 international symposium on Physical design, p.95-102, April 06-08, 1998, Monterey, California, United States [doi>10.1145/274535.274549]
	13	A. B. KAHNO, H. WAN(~, AND A. ZELIKOVSKY, Automated Layout and Phase Assignment Techniques for Dark Field Alternating PSM, in Proc. SPIE 18th Annual BACUS Symposium on Photomask Technology, 1998.
	14	H. LANDIS, P. BURKE, W. COTE, W. HILL, C. HOFFMAN, C. KAANTA, C. KOBUKGER, W. LANGE, M. LEACH, AND S. LUCE, Integration of Chemical-Mechanical Polishing into CMOS Integrated Circuit Manufacturing, Thin Solid Films, 220 (1992), pp. 1-7.
	15	M. D. LEVENSON, Wavefront engineering from 500 nm to i00 ,m CD, in Proceedings of the SPIE - The International Society for Optical Engineering, vol. 3049, 1997, pp. 2-13.
	16	M. D. LEVEN$ON, N. S. VL~WANATI~AN, AND R. A. SIMPSON, Improving Resolution in Photolithography with a Phase- ShijCting Mask, IEEE Trans. on Electron Devices, ED-29 (1982), pp. 1828-1836.
	17	L. LIEBMANN, A. MOLLESS, R. FERGUSON, A. V~'ONG, AND S. MANS- FIELD, Understanding Across Chip Line Width Variation: The First Step Toward Optical Proximity Correction, in SPIE, vol. 3051, 1997, pp. 124-136.
	18	L.W. LIBBMANN, T. H. NEWMAN, R. A. FEItGUSON, R. M. MARTXr~O, A. F. MOLLESS, M. O. NEISSER, AND J. T. WEED, A Comprehensive Evaluation of Major Phase Shift Mask Technologies for Isolated Gate Structures in Logic Designs, in SPIE, vol. 2197, 1994, pp. 612-623.
	19	H.-Y. LIU, L. KARKLIN, Y.-T. WANG, AND Y. C. PAWX, The Application of Alternating Phase-Shifting Masks to 140 nm Gate Patterning (II): Mask Destgn and Manufacturing Tolerances, in SPIE Optical Microlithography XI, vol. 3334, Feb. 1998, pp. 1-14.
	20	H.-Y. L~u, L. KARKLIN, Y.-T. WAr, G, AND Y. C. PATI, The Application of Alternating Phase-Shifting Masks to 1~0 nm Gate Patterning: Line Width Control Improvements and Design Optimization, in SPIE 17th Annual BACUS Symposium on Photomask Technology, vol. SPIE 3236, 1998, pp. 328-337.
	21	Y. Lxu, A. ZAKHOR, AND M. A. ZUNIGA, Computer-Aided Phase Shift Mask Design with Reduced Complezity, IEEE Transactions on Semiconductor Manufacturing, 9 (1996), pp. 170-181.
	22	W, MALY, Computer-aided design for VLSI circuit rnanufacturability, Proceedings of IEEE, 78 (1990), pp. 356-392.
	23	W. Maly, Moore's law and physical design of ICs, Proceedings of the 1998 international symposium on Physical design, p.36, April 06-08, 1998, Monterey, California, United States [doi>10.1145/274535.274540]
	24	A. MISAKA, A. GODA, K. MATSUOKA, H. UMIMOTO,. AND S. ODANAKA, Optical Prozimity Correction in DRAM Cell Using a New Statistical Methodology, in SPIE, vol. 3051, 1997, pp. 763-773.
	25	A. MONIWA, T. TERASAWA, N. HASEGAWA, AND S. OKAZAKI, Algo.- rithm for Phase-Shift Mask Design with Priority on Shifter Placement, Jpn. J. Appl. Phys., 32 (1993), pp. 5874-5879.
	26	A. MONIWA, T. TERASAWA, K. NAKAJO, J. SAKBMI, AND S. OKAZAKI, Heuristic Method for Phase-Conflict Minimization in Automatic Phase-Shi~ Mask Design, Jpn. J. Appl. Phys., 34 (1995), pp. 6584-6589.
	27	J. NISTLER, G. HUGHES, A. MURAY, AND J. WILEY, Issues Associated with the Commercialization of Phase Shift Masks, in SPIE llth Annual BACUS Symposium on Photomask Technology, vol. SPIE 1604, 1991, pp. 236-964.
	28	K. OoI, S. HARA, AND K. KOYAMA, Computer Aided Design Software for Designing Phase-Shining Masks, Jpn. J. Appl. Phys., 32 (1993), pp. 5887-5891.
	29	K. Col, K. KOYAMA, AND M. KIRYU, Method of Designing Phase- Shifting Masks Utilizing a Compactor, Jpn. J. App\|. Phys., 33 (1993), pp. 6774-6778.
	30	G. I. ORLOVA AND Y. G. DORFMAN, Finding the Ma~cimum Cut in a Graph, Engr. Cybernetics, 10 (1972), pp. 502-506.
	31	P. RAI-CHOUDHURY, Handbook of Microlithography, Micromachinin9, and Microfabrication, vol. I: Microlithography, SPIE Optical Engineering Press, Bellingham, 1997.
	32	F. M. SCHELLENBERG, H. ZHANG, AND J. MORROW, Evaluation of OPC Ej~icacy, in Proc. Intl. Syrup. on Aerospace/Defense Sensing and Dual-Use Photonics, vol. 2726, 1996, pp. 680-688.
	33	SEMATECH, WorkshopNotes, in 3rd SEMATECH Litho- Design Workshop, Skamania Lodge, February 1996.
	34	SIA, The National Technology Roadrnap for Semiconductors, Semiconductor industry Association, December 1997.
	35	B. E. STINE, D. S. BONING, J. E. CHUNG, AND L. CAMILLETTI, The Physical and Electrical Effects of Metal-fill Patterning Practices for Oxide Chemical-Mechanical Polishing Processes, IEEE Transactions on Electron Devices, 45 (1998), pp. 665-679.
	36	B.E. STINE, V. MEHROTRA, D. S. BONING, J. E. CHUNG, AND D. J. CIPLICKAS, A Simulation Methodology for Assessing the Impact of Spatial/Pattern Dependent Interconnect Parameter Variation on Circuit Performance, in IEDM Technical Digest, 1997, pp. 133-136.
	37	Dennis Sylvester , Kurt Keutzer, Getting to the bottom of deep submicron, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.203-211, November 08-12, 1998, San Jose, California, United States [doi>10.1145/288548.288614]
	38	T. WAAS, H. HARTMANN, AND W. HBNKE, Automatic Generation of Phase Shift Mask Layouts, Microelectronic Engineering, 23 (1994), pp. 139-142.

CITED BY 11

	Michael Orshansky , Linda Milor , Pinhong Chen , Kurt Keutzer , Chenming Hu, Impact of systematic spatial intra-chip gate length variability on performance of high-speed digital circuits, Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design, November 05-09, 2000, San Jose, California
	Aseem Agarwal , David Blaauw , Vladimir Zolotov, Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations, Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design, p.900, November 09-13, 2003
	Warren Grobman , Robert Boone , Cece Philbin , Bob Jarvis, Reticle enhancement technology trends: resource and manufacturability implications for the implementation of physical designs, Proceedings of the 2001 international symposium on Physical design, p.45-51, April 01-04, 2001, Sonoma, California, United States
	W. Grobman , M. Thompson , R. Wang , C. Yuan , R. Tian , E. Demircan, Reticle enhancement technology: implications and challenges for physical design, Proceedings of the 38th conference on Design automation, p.73-78, June 2001, Las Vegas, Nevada, United States
	Aseem Agarwal , David Blaauw , Vladimir Zolotov, Statistical Clock Skew Analysis Considering Intra-Die Process Variations, Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design, p.914, November 09-13, 2003
	Iris Hui-Ru Jiang , Song-Ra Pan , Yao-Wen Chang , Jing-Yang Jou, Optimal reliable crosstalk-driven interconnect optimization, Proceedings of the 2000 international symposium on Physical design, p.128-133, May 2000, San Diego, California, United States
	Kurt Keutzer , Michael Orshansky, From blind certainty to informed uncertainty, Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems, December 02-03, 2002, Monterey, California, USA
	Pradiptya Ghosh, A New Approach to Abstracting AltPSM Lithography Requirements for IC Design Domains, Analog Integrated Circuits and Signal Processing, v.42 n.3, p.265-276, March 2005
	Iris Hui-Ru Jiang , Song-Ra Pan , Yao-Wen Chang , Jing-Yang Jou, Reliable crosstalk-driven interconnect optimization, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.11 n.1, p.88-103, January 2006
	Andrew B. Kahng, A roadmap and vision for physical design, Proceedings of the 2002 international symposium on Physical design, April 07-10, 2002, San Diego, CA, USA
	Jeong-Taek Kong, CAD for nanometer silicon design challenges and success, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.12 n.11, p.1132-1147, November 2004