The deep sub-micron signal integrity challenge

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

The deep sub-micron signal integrity challenge

Full text

Pdf (511 KB)

Source

International Symposium on Physical Design archive
Proceedings of the 1999 international symposium on Physical design table of contents

Monterey, California, United States

Pages: 4 - 7

Year of Publication: 1999

ISBN:1-58113-089-9

Author

Desmond A. Kirkpatrick

Intel Corporation, 2501 NW 229th Avenue, Hillsboro OR

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 7, Citation Count: 0

Additional Information:

references index terms collaborative colleagues peer to peer

Tools and Actions:	Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/299996.300005 What is a DOI?

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	National Technology Roadmap for Semiconductors. Semiconductor Industrial Alliance, 1997.
	2	Mark Bohr. Quoted in 'the copper conundrum' by ton wilson. 1EEE Transactions on Computers, 10(46): 36, February 1999.
	3	Desmond Andrew Kirkpatrick , Alberto Sangiovanni-Vincentelli, The implications of deep sub-micron technology on the design of high performance digital vlsi systems, 1997
	4	E. Sicard and A. Rubio. Analysis of crosstalk interference in cmos integrated circuits. IEEE Transactions on Electromagnetic Compatibility, 2(34): 124-129, May 1992.
	5	K. L. Shepard , V. Narayanan , P. C. Elmendorf , Gutuan Zheng, Global harmony: coupled noise analysis for full-chip RC interconnect networks, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.139-146, November 09-13, 1997, San Jose, California, United States
	6	Ashok Vittal and M. Sadowska. Crosstalk reduction for vlsi. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 3(16):290-297, March 1997.
	7	Tianxiong Xue , Ernest S. Kuh , Dongsheng Wang, Post global routing crosstalk risk estimation and reduction, Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, p.302-309, November 10-14, 1996, San Jose, California, United States
	8	Tong Gao , C. L. Liu, Minimum crosstalk channel routing, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.692-696, November 07-11, 1993, Santa Clara, California, United States
	9	H. B. Bakoglu. Circuits, lnterconnections, and Packaging for VLSI. Addison-Wesley, 1990.
	10	Desmond A. Kirkpatrick , Alberto L. Sangiovanni-Vincentelli, Techniques for crosstalk avoidance in the physical design of high-performance digital systems, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.616-619, November 06-10, 1994, San Jose, California, United States
	11	Kenneth L. Shepard , Vinod Narayanan, Conquering Noise in Deep-Submicron Digital ICs, IEEE Design & Test, v.15 n.1, p.51-62, January 1998 [doi>10.1109/54.655183]
	12	William J. Grundmann , Dan Dobberpuhl , Randy L. Allmon , Nicholas L. Rethman, Designing high performance CMOS microprocessors using full custom techniques, Proceedings of the 34th annual conference on Design automation, p.722-727, June 09-13, 1997, Anaheim, California, United States [doi>10.1145/266021.266353]