Satisfiability-based layout revisited

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Satisfiability-based layout revisited: detailed routing of complex FPGAs via search-based Boolean SAT

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International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays table of contents

Monterey, California, United States

Pages: 167 - 175

Year of Publication: 1999

ISBN:1-58113-088-0

Authors

Gi-Joon Nam	Department of EECS, University of Michigan, Ann Arbor, MI
Karem A. Sakallah	Department of EECS, University of Michigan, Ann Arbor, MI
Rob A. Rutenbar	Department of ECE, Carnegie Mellon University, Pittsburgh, PA

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 27, Citation Count: 14

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references cited by index terms collaborative colleagues peer to peer

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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CITED BY 14

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	Rajeev Jayaraman, Physical design for FPGAs, Proceedings of the 2001 international symposium on Physical design, p.214-221, April 01-04, 2001, Sonoma, California, United States
	Frank Schmiedle , Daniel Unruh , Bernd Becker, Exact switchbox routing with search space reduction, Proceedings of the 2000 international symposium on Physical design, p.26-32, May 2000, San Diego, California, United States
	G. Nam , K. Sakallah , R. Rutenbar, A boolean satisfiability-based incremental rerouting approach with application to FPGAs, Proceedings of the conference on Design, automation and test in Europe, p.560-565, March 2001, Munich, Germany
	Slawomir Pilarski , Gracia Hu, SAT with partial clauses and back-leaps, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA
	Keith So, Solving hard instances of FPGA routing with a congestion-optimal restrained-norm path search space, Proceedings of the 2007 international symposium on Physical design, March 18-21, 2007, Austin, Texas, USA
	Grant Wigley , David Kearney, The management of applications for reconfigurable computing using an operating system, Australian Computer Science Communications, v.24 n.3, p.73-81, January-February 2002
	Xiaoyu Song , William N. N. Hung , Alan Mishchenko , Malgorzata Chrzanowska-Jeske , Alan Coppola , Andrew Kennings, Board-level multiterminal net assignment, Proceedings of the 12th ACM Great Lakes symposium on VLSI, April 18-19, 2002, New York, New York, USA
	Hui Xu , Rob A. Rutenbar , Karem Sakallah, sub-SAT: a formulation for relaxed boolean satisfiability with applications in routing, Proceedings of the 2002 international symposium on Physical design, April 07-10, 2002, San Diego, CA, USA
	Gi-Joon Nam , Fadi Aloul , Karem Sakallah , Rob Rutenbar, A comparative study of two Boolean formulations of FPGA detailed routing constraints, Proceedings of the 2001 international symposium on Physical design, p.222-227, April 01-04, 2001, Sonoma, California, United States
	Miron Abramovici , Jose T. de Sousa , Daniel Saab, A massively-parallel easily-scalable satisfiability solver using reconfigurable hardware, Proceedings of the 36th ACM/IEEE conference on Design automation, p.684-690, June 21-25, 1999, New Orleans, Louisiana, United States
	João P. Marques-Silva , Karem A. Sakallah, Boolean satisfiability in electronic design automation, Proceedings of the 37th conference on Design automation, p.675-680, June 05-09, 2000, Los Angeles, California, United States
	Cristian Coarfa , Demetrios D. Demopoulos , Alfonso San Miguel Aguirre , Devika Subramanian , Moshe Y. Vardi, Random 3-SAT: The Plot Thickens, Constraints, v.8 n.3, p.243-261, July 2003
	Katherine Compton , Scott Hauck, Reconfigurable computing: a survey of systems and software, ACM Computing Surveys (CSUR), v.34 n.2, p.171-210, June 2002