Software timing analysis using HW/SW cosimulation and instruction set simulator

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Software timing analysis using HW/SW cosimulation and instruction set simulator

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International Conference on Hardware Software Codesign archive
Proceedings of the 6th international workshop on Hardware/software codesign table of contents

Seattle, Washington, United States

Pages: 65 - 69

Year of Publication: 1998

ISBN:0-8186-8442-9

Authors

Jie Liu	Department of EECS, University of California, Berkeley, CA
Marcello Lajolo	Dipartimento di Elettronica, Politecnico di Torino, Torino, IalyY 10129
Alberto Sangiovanni-Vincentelli	Department of EECS, University of California, Berkeley, CA

Sponsors

SIGSOFT: ACM Special Interest Group on Software Engineering
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society
IFIP : International Federation for Information Processing

Publisher

IEEE Computer Society Washington, DC, USA

Bibliometrics

Downloads (6 Weeks): 6, Downloads (12 Months): 31, Citation Count: 25

Additional Information:

references cited by index terms collaborative colleagues peer to peer

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Felice Balarin , Massimiliano Chiodo , Paolo Giusto , Harry Hsieh , Attila Jurecska , Luciano Lavagno , Claudio Passerone , Alberto Sangiovanni-Vincentelli , Ellen Sentovich , Kei Suzuki , Bassam Tabbara, Hardware-software co-design of embedded systems: the POLIS approach, Kluwer Academic Publishers, Norwell, MA, 1997
	2	Ptolemy Home Page, "http://ptolemy.eecs.berkeley.edu"
	3	Esterel Home Page, "http://www.inria.tr/meije/esterel"
	4	R. Ernst , W. Ye, Embedded program timing analysis based on path clustering and architecture classification, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.598-604, November 09-13, 1997, San Jose, California, United States
	5	K. ten Hagen, H. Meyr, "Timed and Untimed Hardware Software Cosimulation: Application and Efficient Implementation", Proceedings of Int. Workshop on Hardware-Software Codesign, Oct. 1993
	6	E. A. Lee and A. Sangiovanni-Vincentelli, "A Denotational Framework for Comparing Models of Computation", ERL Memorandum UCB/ERL M97/11, University of California, Berkeley, CA 94720, January 30, 1997.
	7	S. Leef, "Hardware and Software Co-Verification - Key to Co- Design", Electronic Design, September 15,97, PP 67-7 1
	8	C. Passerone, L.Lavagno, etc. "Trade-off Evaluation in Embedded System Design via Co-simulation". Proceedings of ASP-DAC, PP 291-297,1997.
	9	Kurt Keutzer, Hardware/software co-simulation, Proceedings of the 31st annual conference on Design automation, p.439-440, June 06-10, 1994, San Diego, California, United States [doi>10.1145/196244.196458]
	10	Kei Suzuki , Alberto Sangiovanni-Vincentelli, Efficient software performance estimation methods for hardware/software codesign, Proceedings of the 33rd annual conference on Design automation, p.605-610, June 03-07, 1996, Las Vegas, Nevada, United States [doi>10.1145/240518.240633]
	11	"ST20 'Osprey' Toolset: User Manual", SGS-THOMSON Electronics, March 1997
	12	S. Yoo, K. Choi, "Synchronization Overhead Reduction in Timed Cosimulation" Proceedings of Int. High Level Design Validation.

CITED BY 25

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	Ho Young Kim , Tag Gon Kim, Performance simulation modeling for fast evaluation of pipelined scalar processor by evaluation reuse, Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
	Marcello Lajolo , Mihai Lazarescu , Alberto Sangiovanni-Vincentelli, A compilation-based software estimation scheme for hardware/software co-simulation, Proceedings of the seventh international workshop on Hardware/software codesign, p.85-89, March 1999, Rome, Italy
	R. Ruelland , G. Gateau , T. Meynard , J. C. Hapiot, Digital emulator and observer of multicell converter, Mathematics and Computers in Simulation, v.63 n.3-5, p.335-347, 17 November 2003
	M. Meerwein , C. Baumgartner , T. Wieja , W. Glauert, Embedded systems verification with FGPA-enhanced in-circuit emulator, Proceedings of the 13th international symposium on System synthesis, September 20-22, 2000, Madrid, Spain
	Anish Muttreja , Anand Raghunathan , Srivaths Ravi , Niraj K. Jha, Automated energy/performance macromodeling of embedded software, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
	Benoit Clement , Richard Hersemeule , Etienne Lantreibecq , Bernard Ramanadin , Pierre Coulomb , Francois Pogodalla, Fast prototyping: a system design flow applied to a complex system-on-chip multiprocessor design, Proceedings of the 36th ACM/IEEE conference on Design automation, p.420-424, June 21-25, 1999, New Orleans, Louisiana, United States
	Per Bjuréus , Axel Jantsch, Performance analysis with confidence intervals for embedded software processes, Proceedings of the 14th international symposium on Systems synthesis, September 30-October 03, 2001, Montréal, P.Q., Canada
	J. Jung , S. Yoo , K. Choi, Performance improvement of multi-processor systems cosimulation based on SW analysis, Proceedings of the conference on Design, automation and test in Europe, p.749-753, March 2001, Munich, Germany
	Luca Benini , Davide Bertozzi , Davide Bruni , Nicola Drago , Franco Fummi , Massimo Poncino, SystemC Cosimulation and Emulation of Multiprocessor SoC Designs, Computer, v.36 n.4, p.53-59, April 2003
	Francois Pogodalla , Richard Hersemeule , Pierre Coulomb, Fast prototyping: a system design flow for fast design, prototyping and efficient IP reuse, Proceedings of the seventh international workshop on Hardware/software codesign, p.69-73, March 1999, Rome, Italy
	Luca Formaggio , Franco Fummi , Graziano Pravadelli, A timing-accurate HW/SW co-simulation of an ISS with SystemC, Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, September 08-10, 2004, Stockholm, Sweden
	Jeffry T. Russell , Margarida F. Jacome, Architecture-level performance evaluation of component-based embedded systems, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
	G. Beltrame , C. Brandolese , W. Fornaciari , F. Salice , D. Sciuto , V. Trianni, Modeling assembly instruction timing in superscalar architectures, Proceedings of the 15th international symposium on System Synthesis, October 02-04, 2002, Kyoto, Japan
	Franco Fummi , Stefano Martini , Giovanni Perbellini , Massimo Poncino, Native ISS-SystemC Integration for the Co-Simulation of Multi-Processor SoC, Proceedings of the conference on Design, automation and test in Europe, p.10564, February 16-20, 2004
	Jason Cong , Karthik Gururaj , Guoling Han , Adam Kaplan , Mishali Naik , Glenn Reinman, MC-Sim: an efficient simulation tool for MPSoC designs, Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design, November 10-13, 2008, San Jose, California
	Franco Fummi , Mirko Loghi , Massimo Poncino , Graziano Pravadelli, A cosimulation methodology for HW/SW validation and performance estimation, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.14 n.2, p.1-32, March 2009
	Franco Fummi , Mirko Loghi , Stefano Martini , Marco Monguzzi , Giovanni Perbellini , Massimo Poncino, Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation, Proceedings of the conference on Design, Automation and Test in Europe, p.798-803, March 07-11, 2005
	Marcello Lajolo , Anand Raghunathan , Sujit Dey, Efficient power co-estimation techniques for system-on-chip design, Proceedings of the conference on Design, automation and test in Europe, p.27-34, March 27-30, 2000, Paris, France
	Ivano Barbieri , Massimo Bariani , Alberto Cabitto , Marco Raggio, A Simulation and Exploration Technology for Multimedia-Application-Driven Architectures, Journal of VLSI Signal Processing Systems, v.41 n.2, p.153-168, September 2005
	Marcello Lajolo , Anand Raghunathan , Sujit Dey , Luciano Lavagno, Cosimulation-based power estimation for system-on-chip design, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.10 n.3, p.253-266, June 2002
	Amer Baghdadi , Nacer-Eddine Zergainoh , Wander O. Cesário , Ahmed Amine Jerraya, Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems, IEEE Transactions on Software Engineering, v.28 n.9, p.822-831, September 2002
	Maziar Goudarzi , Shaahin Hessabi , Naser MohammadZadeh , Nasim Zainolabedini, The ODYSSEY approach to early simulation-based equivalence checking at ESL level using automatically generated executable transaction-level model, Microprocessors & Microsystems, v.32 n.7, p.364-374, October, 2008
	Frank Vahid , Tony Givargis, Highly-cited ideas in system codesign and synthesis, Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, October 19-24, 2008, Atlanta, GA, USA
	Mirko Loghi , Tiziana Margaria , Graziano Pravadelli , Bernhard Steffen, Dynamic and formal verification of embedded systems: a comparative survey, International Journal of Parallel Programming, v.33 n.6, p.585-611, December 2005