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Nostradamus: a floorplanner of uncertain design
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Source International Symposium on Physical Design archive
Proceedings of the 1998 international symposium on Physical design table of contents
Monterey, California, United States
Pages: 18 - 23  
Year of Publication: 1998
ISBN:1-58113-021-X
Authors
K. Bazargan  Department of Electrical and Computer Engineering, Northwestern University, Evanston, IL
S. Kim  Department of Electrical and Computer Engineering, Northwestern University, Evanston, IL
M. Sarrafzadeh  Department of Electrical and Computer Engineering, Northwestern University, Evanston, IL
Sponsors
IEEE-CS : Computer Society
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 2,   Downloads (12 Months): 11,   Citation Count: 3
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ABSTRACT

Floorplanning is an early phase in chip planning. It provides information on approximate area, delay, power, and other performance measures. Careful floorplanning is thus of extreme importance. In many applications while a good floorplan is needed, not all modules' information are available, or even w orse, part of the pro vided information is inaccurate. Floorplanning with uncertainty is the problem of obtaining a good floorplan under uncertainty. In this paper, the floorplanning problem with uncertainty is form ulated. It is established that traditional floorplanners are incapable of handling uncertainty. An effective method for dealing with uncertain data is proposed. Experiments sho w that, for example, with up to 30% input uncertainty an area estimate with less than 7% error can be obtained.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
K. Bazargan: colleagues
S. Kim: colleagues
M. Sarrafzadeh: colleagues

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