C5M—a control logic layout synthesis system for high-performance microprocessors

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C5M—a control logic layout synthesis system for high-performance microprocessors

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International Symposium on Physical Design archive
Proceedings of the 1997 international symposium on Physical design table of contents

Napa Valley, California, United States

Pages: 110 - 115

Year of Publication: 1997

ISBN:0-89791-927-0

Authors

Jeffrey L. Burns	IBM Austin Research Laboratory, Austin, TX
Jack A. Feldman	IBM Haifa Research Laboratory, Haifa, Israel

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 2, Downloads (12 Months): 6, Citation Count: 1

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	3	R. Bar-Yehuda, 3. Feldman, R. Pinter and S. Wimer, "Depth First Search and Dynamic Programming Algorithms for Efficient CMOS Cell Generation," IEEE Trans. on CAD of Its and Systems, July 1989,
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