Circuit noise evaluation by Padé approximation based model-reduction techniques

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Circuit noise evaluation by Padé approximation based model-reduction techniques

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International Conference on Computer Aided Design archive
Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design table of contents

San Jose, California, United States

Pages: 132 - 138

Year of Publication: 1997

ISBN:0-8186-8200-0

Authors

Peter Feldmann	Bell Laboratories, Murray Hill, NJ
Roland W. Freund	Bell Laboratories, Murray Hill, NJ

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society

Publisher

IEEE Computer Society Washington, DC, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 10, Citation Count: 9

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ABSTRACT

This paper introduces a new circuit noise analysis and modeling method. The noise analysis method computes an analytic expression of frequency, in rational form, which represents the Pad\'e approximation of the noise power spectral density. The approximation can be carried out efficiently, to the required accuracy, using a variant of the PVL~\cite{FelF95} or MPVL~\cite{FelF95b} algorithms. The new method is significantly more efficient than traditional methods for noise computation at numerous frequency points. In addition, it allows for a compact and cascadable modeling of noise that can be used in system level simulations.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	P. Feldmann and R. W. Freund, Efficient linear circuit analysis by Pad( approximation via the Lanczos process, IEEE Trans. Computer-Aided Design 14 (1995), 639-649.
	2	P. Feldmann , R. W. Freund, Reduced-order modeling of large linear subcircuits via a block Lanczos algorithm, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.474-479, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217573]
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	6	Rohrer, R.A., Nagel L., Meyer, R. and Weber, L., Computationally efficient electronic-circuit noise calculations, IEEE J. Solid State Circuits, vol. SC- 6, pp. 204-213, 1971.
	7	J. Roychowdhury and P. Feldmann. "A New Linear-Time Harmonic Balance Algorithm for Cyclostationary Noise Analysis in RF Circuits," Proc. Asia and South-Pacific Design Automation Conference, Jan 1997.

CITED BY 9

	XiangDong Tan , C.-J. Richard Shi, Symbolic circuit-noise analysis and modeling with determinant decision diagrams, Proceedings of the 2000 conference on Asia South Pacific design automation, p.283-288, January 2000, Yokohama, Japan
	Yang Xu , Xin Li , Peng Li , Lawrence Pileggi, Noise Macromodel for Radio Frequency Integrated Circuits, Proceedings of the conference on Design, Automation and Test in Europe, p.10150, March 03-07, 2003
	Chenjie Gu , Jaijeet Roychowdhury, Model reduction via projection onto nonlinear manifolds, with applications to analog circuits and biochemical systems, Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design, November 10-13, 2008, San Jose, California
	Joel R. Phillips, Model reduction of time-varying linear systems using approximate multipoint Krylov-subspace projectors, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.96-102, November 08-12, 1998, San Jose, California, United States
	Al Dunlop , Alper Demir , Peter Feldmann , Sharad Kapur , David Long , Robert Melville , Jaijeet Roychowdhury, Tools and methodology for RF IC design, Proceedings of the 35th annual conference on Design automation, p.414-420, June 15-19, 1998, San Francisco, California, United States
	Q. Yu , E. Kuh, Explicit formulas and efficient algorithm for moment computation of coupled RC trees with lumped and distributed elements, Proceedings of the conference on Design, automation and test in Europe, p.445-450, March 2001, Munich, Germany
	Jaijeet Roychowdhury, Reduced-order modelling of linear time-varying systems, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.92-95, November 08-12, 1998, San Jose, California, United States
	Alper Demir , Peter Feldmann, Modeling and simulation of the interference due to digital switching in mixed-signal ICs, Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design, p.70-75, November 07-11, 1999, San Jose, California, United States
	Alper Demir, Non-Monte Carlo formulations and computational techniques for the stochastic non-linear Schrödinger equation, Journal of Computational Physics, v.201 n.1, p.148-171, 20 November 2004