| Disjunctive partitioning and partial iterative squaring: an effective approach for symbolic traversal of large circuits |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 34th annual Design Automation Conference
table of contents
Anaheim, California, United States
Pages: 728 - 733
Year of Publication: 1997
ISBN:0-89791-920-3
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Authors
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Gianpiero Cabodi
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Politecnico di Torino, Dip. di Automatica e Informatica, Turin, Italy
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Paolo Camurati
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Università di Udine Dip. di Matematica e Informatica, Udine, Italy
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Luciano Lavagno
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Politecnico di Torino, Dip. di Elettronica, Turin, Italy
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Stefano Quer
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Politecnico di Torino, Dip. di Automatica e Informatica, Turin, Italy
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Downloads (6 Weeks): 1, Downloads (12 Months): 13, Citation Count: 23
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ABSTRACT
Extending the applicability of reachability analysis to large andreal circuits is a key issue.In fact they are still limited forthe following reasons: peak BDD size during image computation,BDD explosion for representing state sets and very highsequential depth.Following the promising trend of partitioning and problem decomposition,we present a new approach based on a disjunctivepartitioned transition relation and on an improved iterativesquaring.In this approach a Finite State Machine is decomposedand traversed one "functioning-mode" at a time bymeans of the "disjunctive" partitioned approach.The overall algorithm aims at lowering the intermediate peakBDD size pushing further reachability analysis.Experimentson a few industrial circuits containing counters and on somelarge benchmarks show the feasibility of the approach.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Gianpiero Cabodi , Paolo Camurati , Stefano Quer, Improved reachability analysis of large finite state machines, Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, p.354-360, November 10-14, 1996, San Jose, California, United States
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J.R. Butch, E.M. Clarke, D.E. Long, K.L. McMillan, D.L. Dill: "Symbolic Model Checking for Sequential Circuit Verification," lEEE-Trar~saction on CAD, pp. 401-424, Volume 13, Number 4, April 1994
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J. R. Burch , E. M. Clarke , D. E. Long, Representing circuits more efficiently in symbolic model checking, Proceedings of the 28th conference on ACM/IEEE design automation, p.403-407, June 17-22, 1991, San Francisco, California, United States
[doi> 10.1145/127601.127702]
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H. Cho, G.D. I-Iachtel, E. Macii, M. Poncino, K. Ravi, F. Somenzi, "Approximate Finite State Machine Traversal: Extensions and New Results," in Proc. IWLS'95, May 1995
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M68HCll Reference Manual, Motorola inc., 1991
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CITED BY 23
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Debashis Sahoo , Jawahar Jain , Subramanian K. Iyer , David L. Dill , E. Allen Emerson, Multi-threaded reachability, Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
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Gianpiero Cabodi , Paolo Camurati , Stefano Quer, Improving symbolic traversals by means of activity profiles, Proceedings of the 36th ACM/IEEE conference on Design automation, p.306-311, June 21-25, 1999, New Orleans, Louisiana, United States
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Andreas Hett , Christoph Scholl , Bernd Becker, Distance driven finite state machine traversal, Proceedings of the 37th conference on Design automation, p.39-42, June 05-09, 2000, Los Angeles, California, United States
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Kavita Ravi , Kenneth L. McMillan , Thomas R. Shiple , Fabio Somenzi, Approximation and decomposition of binary decision diagrams, Proceedings of the 35th annual conference on Design automation, p.445-450, June 15-19, 1998, San Francisco, California, United States
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In-Ho Moon , James H. Kukula , Kavita Ravi , Fabio Somenzi, To split or to conjoin: the question in image computation, Proceedings of the 37th conference on Design automation, p.23-28, June 05-09, 2000, Los Angeles, California, United States
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Roderick Bloem , Kavita Ravi , Fabio Somenzi, Symbolic guided search for CTL model checking, Proceedings of the 37th conference on Design automation, p.29-34, June 05-09, 2000, Los Angeles, California, United States
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M. D. Nguyen , D. Stoffel , M. Wedler , W. Kunz, Transition-by-transition FSM traversal for reachability analysis in bounded model checking, Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design, p.1068-1075, November 06-10, 2005, San Jose, CA
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Prakash M. Peranandam , Pradeep K. Nalla , Jürgen Ruf , Roland J. Weiss , Thomas Kropf , Wolfgang Rosenstiel, Fast falsification based on symbolic bounded property checking, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
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Chao Wang , Zijiang Yang , Franjo Ivančić , Aarti Gupta, Disjunctive image computation for embedded software verification, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
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Amit Narayan , Adrian J. Isles , Jawahar Jain , Robert K. Brayton , Alberto L. Sangiovanni-Vincentelli, Reachability analysis using partitioned-ROBDDs, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.388-393, November 09-13, 1997, San Jose, California, United States
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Priyank Kalla , Zhihong Zeng , Maciej J. Ciesielski , Chilai Huang, A BDD-based satisfiability infrastructure using the unate recursive paradigm, Proceedings of the conference on Design, automation and test in Europe, p.232-236, March 27-30, 2000, Paris, France
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William Chan , Richard J. Anderson , Paul Beame , David Notkin , David H. Jones , William E. Warner, Optimizing Symbolic Model Checking for Statecharts, IEEE Transactions on Software Engineering, v.27 n.2, p.170-190, February 2001
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