| A graph-based synthesis algorithm for AND/XOR networks |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 34th annual Design Automation Conference
table of contents
Anaheim, California, United States
Pages: 107 - 112
Year of Publication: 1997
ISBN:0-89791-920-3
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Authors
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Yibin Ye
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School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN
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Kaushik Roy
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School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN
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Downloads (6 Weeks): 1, Downloads (12 Months): 12, Citation Count: 0
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ABSTRACT
In this paper, we introduce a Shared Multiple Rooted XOR-based Decomposition Diagram (XORDD) to represent functions with multiple outputs. Based on the XORDD representation, we develop a synthesis algorithm for generalExclusive Sum-of-Product forms (ESOP). By iteratively applying transformations and reductions, we obtain a compactXORDD which gives a minimized ESOP. Our method cansynthesize larger circuits than previously possible. The compact ESOP representation provides a form that is easier to synthesize for XOR heavy multi-level circuit, such as arithmetic functions. We have applied our synthesis techniquesto a large set of benchmark circuits in both PLA and combinational formats. Results of the minimized ESOP forms obtained from our synthesis algorithm are also comparedto the SOP forms generated by ESPRESSO. Among the 74circuits we have experimented with, the minimized ESOP'shave fewer product terms than those of SOP's in 39 circuits.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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R.Brayton, R.Rudell, A.Sangiovanni-Vincentelli, and A.Wang, "MIS: A Multi-level Logic Optimization System," IEEE Transactions on CAD/ICAS, Vol. CAD-6, No. 6, November 1987, pp. 1062-1081.
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R. Drechsler , A. Sarabi , M. Theobald , B. Becker , M. A. Perkowski, Efficient representation and manipulation of switching functions based on ordered Kronecker functional decision diagrams, Proceedings of the 31st annual conference on Design automation, p.415-419, June 06-10, 1994, San Diego, California, United States
[doi> 10.1145/196244.196444]
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S. Malik, A.R.Wang, R.K. Brayton, and A. Sangiovanni- Vincentelli, "Logic Verification using Binary Decision Diagrams," Proc. Intl. Conference on Computer-Aided Design., 1988, pp. 6-9.
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R.Rudell and A. Sangiovanni-Vincentelli, "Multiple-valued Minimization for PLA Optimization," IEEE transactions on CAD/ICAS, Vol. CAD-6, No. 5, September 1987, pp727-750.
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T.Sasao, "EXMIN2: A Simplification Algorithm for Exclusive- OR-SUM-of Products Expressions for Multiple-Valued-Input Two-Valued-Output Functions," IEEE Trans. on Computer- Aided Design, Vol. 12, No. 5, May 1993, pp. 621-632.
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