Macromodeling of the A.C. characteristics of CMOS Op-amps

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Macromodeling of the A.C. characteristics of CMOS Op-amps

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International Conference on Computer Aided Design archive
Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design table of contents

Santa Clara, California, United States

Pages: 334 - 340

Year of Publication: 1993

ISBN:0-8186-4490-7

Authors

Pradip Mandal	Electrical Communication Engg. Dept., Indian Institute of Science, Bangalore 560012, India
V. Visvanathan	Computer-Aided Design Laboratory, Supercomputer Education and Research Centre, Indian Institute of Science, Bangalore 560012, India

Sponsors

IEEE-CS : Computer Society
SIGDA: ACM Special Interest Group on Design Automation

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 10, Citation Count: 3

Additional Information:

references cited by collaborative colleagues peer to peer

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	M. G. R. Degrauwe et. al., "Towards an Analog System Design Environment", IEEE J. of Solid State Circuits, Vol. 24, No. 3, pp. 659-671, June 1989.
	2	H. Y. Koh et. al., "OPASYN: A Complier for CMOS Operational Amplifiers", IEEE Trans. on CAD, Vol. 9, No. 2, pp. 113-125, Feb. 1990.
	3	W. Nye et. at., "DELIGHT.SPICE: An Optimization-Based System for the Design of Integrated Circuits", IEEE Trans. on CAD, Vol. 7, No. 4, pp. 501-519, April 1988.
	4	J. Shyu and A. Sangiovanni-Vincentelli, "EC- STASY: A New Environment for IC Design Optimization", Proc. ICCAD, pp. 484-487, Nov. 1988.
	5	K. Singhal et. al., "The CENTER Design Optimization System", AT ~J T Technical Journal, Vol. 68, No. 3, pp. 77-92, May/June 1989.
	6	P. Cox et. al. "Statistical Modeling for Effective Parametric Yield Estimation of MOS VLSI circuits", IEEE J. of Solid-State Circuits, Vol. 20, No. 1, pp. 391-398, Feb. 1985.
	7	P. Feldmann and S. W. Director, "Accurate and Efficient Evaluation of Circuit Yield and Yield Gradients", Proc. ICCAD, pp. 120-123, Nov. 1990.
	8	T. K. Yu eL al., "Parametric Yield Optimization of CMOS Analog Circuits by Quadratic Statistical Circuit Performance Models", Int. J. of Circuit Theory and Applications, Vol. 19, pp. 579- 592, 1991.
	9	G. E. P. Box, W. G. Hunter and J. S. Hunter, Statistics for Experimenters An Introduction to Design, Data Analysis and Model Building. New York: Wiley, 1978.
	10	George E P Box , Norman R Draper, Empirical model-building and response surface, John Wiley & Sons, Inc., New York, NY, 1986
	11	R. Gregorian and G. C. Temes, Analog MOS Integrated Circuits for Signal Processing. New York: Wiley, 1986.
	12	P. Van der Wolf et. al. "An introduction to the NELSIS IC Design System", Delft University of Technology, The Netherlands, 1990.-
	13	X. ttuang et. al. "AWEsim: A Program for the Efficient Analysis of Linear(ized')Circuits", Proc. ICCAD, pp. 534-537, Nov. 1990.

CITED BY 3

	Y. Kiliç , M. Zwoliński, Behavioral Fault Modeling and Simulation Using VHDL-AMS to Speed-Up Analog Fault Simulation, Analog Integrated Circuits and Signal Processing, v.39 n.2, p.177-190, May 2004
	R. Vemuri , G. Wolfe, Adaptive sampling and modeling of analog circuit performance parameters with pseudo-cubic splines, Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, p.931-938, November 07-11, 2004
	Suresh Seshadri , Jacob A. Abraham, Frequency Response Verification of Analog Circuits Using Global Optimization Techniques, Journal of Electronic Testing: Theory and Applications, v.17 n.5, p.395-408, October 2001

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Pradip Mandal: colleagues

V. Visvanathan: colleagues

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