| A grid-based approach for connectivity binding with geometric costs |
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International Conference on Computer Aided Design
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Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
table of contents
Santa Clara, California, United States
Pages: 94 - 99
Year of Publication: 1993
ISBN:0-8186-4490-7
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Authors
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Hyuk-Jae Jang
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Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA
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Barry M. Pangrle
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Department of Computer Science and Engineering, The Pennsylvania State University, University Park, PA
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IEEE Computer Society Press
Los Alamitos, CA, USA
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| Bibliometrics |
Downloads (6 Weeks): 2, Downloads (12 Months): 8, Citation Count: 10
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Claesen, L., E Catthoor, D. Lanneer, G. Goossens, S. Note, J. Van Meerborgen, and H. DeMan, "Automatic synthesis of signal Processing benchmark using the CATHEDRAL silicon compiler," Prec. of CICC, pp. 14.7.1-14.7.4, 1988.
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DeWilde, P., E. Depretter~, and R. Nouta, "Paralld and pipelined VLSI implementation of signal processing algorithms," S. Y. Kung, H. J. Whitehouse, and T. Kailath (eds.), VLSI and Modern Signal Processing, pp. 257-264, Prentice- Hall, 1985.
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Devadas, S., and A. R. Newton, "Algorithms for hardware allocation in data path synthesis," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 8, No. 7, pp. 768-781, July 1989.
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JaPa93
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Jang, H., and B. M. Pangrle, "GB: a new grid-based binding approach for high-level synthesis," Proc. of the 6th International Conference on VLSI Design, pp. 180-185, 1993.
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Knapp, D. W., "Feedback-driven dalapath optimization in Fasolt," Proc. of international Confen,nce on Computer-Aided Design-90, pp. 300-303, 1990.
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Tai A. Ly , W. Lloyd Elwood , Emil F. Girczyc, A generalized interconnect model for data path synthesis, Proceedings of the 27th ACM/IEEE conference on Design automation, p.168-173, June 24-27, 1990, Orlando, Florida, United States
[doi> 10.1145/123186.123248]
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Mentor-Graphics Corporation, All ,New Text for Datapath User's Guide, 1992.
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Barry M. Pangrle , Forrest D. Brewer , Donald A. Lobo , Andrew Seawright, Relevant issues in high-level connectivity synthesis, Proceedings of the 28th conference on ACM/IEEE design automation, p.607-610, June 17-22, 1991, San Francisco, California, United States
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Preas, B. T., and M. J. Lorenzetti, editors, Physical Design Automation of VLSI Systems, Benjamin/Cummings, Menlo Park, CA, 1988.
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Soukup, J., "Circuit layout," Proc. of the IEEE, vol. 69, no. 10, pp. 1281-1304, October 1981.
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CITED BY 10
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Kiarash Bazargan , Abhishek Ranjan , Majid Sarrafzadeh, Fast and accurate estimation of floorplans in logic/high-level synthesis, Proceedings of the 10th Great Lakes symposium on VLSI, p.95-100, March 02-04, 2000, Chicago, Illinois, United States
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