Fault-based automatic test generator for linear analog circuits

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Fault-based automatic test generator for linear analog circuits

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International Conference on Computer Aided Design archive
Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design table of contents

Santa Clara, California, United States

Pages: 88 - 91

Year of Publication: 1993

ISBN:0-8186-4490-7

Authors

Naveena Nagi	Computer Engineering Research Center, University of Texas at Austin, Austin, TX
Abhijit Chatterjee	School of Electrical Engineering, Georgia Institute of Technology, Atlanta, GA
Ashok Balivada	Computer Engineering Research Center, University of Texas at Austin, Austin, TX
Jacob A. Abraham	Computer Engineering Research Center, University of Texas at Austin, Austin, TX

Sponsors

IEEE-CS : Computer Society
SIGDA: ACM Special Interest Group on Design Automation

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 11, Citation Count: 22

Additional Information:

references cited by collaborative colleagues peer to peer

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	L. Milor and V. Vi~vanathan. Detection of Catastrophic faults in Analog Integrated Circuits. IEEE Trans. Computer-Aided Design pp. 114- 130, 1989.
	2	M.J. Marlett and J.A. Abraham. DC-IATP: An iterative analog circuit test generation program for generating DC single pattern tests. Proc 1EEE lnternalional Test Conference pp. 839-.845, 1988.
	3	M. Soma. A Design-for-Test Methodology for Active Analog Filters. Proc IEEE International Test Conference pp. 183-192, 1990.
	4	Sheng-Jen Tsai, Test Vector Generation for Linear Analog Devices, Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner, p.592-597, October 26-30, 1991
	5	N. Nagi and :I.A. Abraham. Hierarchical Fault Modeling for Analog and Mixed-signal circuits. Proc 1EEE VLSI Test Symposium pp. 96-101, 1992.
	6	Naveena Nagi , Abhijit Chatterjee , Jacob A. Abraham, DRAFTS: discretized analog circuit fault simulator, Proceedings of the 30th international conference on Design automation, p.509-514, June 14-18, 1993, Dallas, Texas, United States [doi>10.1145/157485.165008]
	7	P. Goel. An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits. IEEE Trans. Computers pp. 215-222, 1981.
	8	L.T. Bruton. RC-Active Circuits. Prentice-Hall, lnc., 1980.
	9	M.E. Van Valkenburg. Analog Filter Design. Holt, Rinehart and Winston, 1982.

CITED BY 22

	Chen-Yang Pan , Kwang-Ting Cheng, Pseudo-random testing and signature analysis for mixed-signal circuits, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.102-107, November 05-09, 1995, San Jose, California, United States
	Iboun Taimiya Sylla , Mustapha Slamani, Improving Design and Fault Detection inLinear and Nonlinear High Frequency Circuits byPerforming a Sensitivity Based Analysis, Analog Integrated Circuits and Signal Processing, v.27 n.3, p.247-258, June 2001
	Giri Devarayanadurg , Mani Soma, Dynamic test signal design for analog ICs, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.627-630, November 05-09, 1995, San Jose, California, United States
	J. Velasco-Medina , T. Calin , M. Nicolaidis, Fault detection for linear analog circuits using current injection, Proceedings of the conference on Design, automation and test in Europe, p.987, February 23-26, 1998, Le Palais des Congrés de Paris, France
	Mustapha Slamani , Karim Arabi, Reducing Test Time in the High-Volume Production of Analog Circuits using Efficient Test-Vector Generation and Interpolation Techniques, Journal of Electronic Testing: Theory and Applications, v.17 n.5, p.417-425, October 2001
	Chen-Yang Pan , Kwang-Ting Cheng , Sandeep Gupta, A comprehensive fault macromodel for opamps, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.344-348, November 06-10, 1994, San Jose, California, United States
	Mustapha Slamani , Bozena Kaminska, Multifrequency Analysis of Faults in Analog Circuits, IEEE Design & Test, v.12 n.2, p.70-80, June 1995
	Pramodchandran N. Variyam , Abhijit Chatterjee, Test generation for comprehensive testing of linear analog circuits using transient response sampling, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.382-385, November 09-13, 1997, San Jose, California, United States
	Abdelhakim Khouas , Anne Derieux, Fault Simulation for Analog Circuits Under Parameter Variations, Journal of Electronic Testing: Theory and Applications, v.16 n.3, p.269-278, June 2000
	Giri Devarayanadurg , Mani Soma, Analytical fault modeling and static test generation for analog ICs, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.44-47, November 06-10, 1994, San Jose, California, United States
	Salvador Mir , Bernard Courtois , Marcelo Lubaszewski , Vladimir Kolarik, Automatic Test Generation for Maximal Diagnosis of Linear Analogue Circuits, Proceedings of the 1996 European conference on Design and Test, p.254, March 11-14, 1996
	Ashok Balivada , Jin Chen , Jacob A. Abraham, Analog Testing with Time Response Parameters, IEEE Design & Test, v.13 n.2, p.18-25, June 1996
	Sam D. Huynh , Seongwon Kim , Mani Soma , Jinyan Zhang, Testability analysis and multi-frequency ATPG for analog circuits and systems, Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design, p.376-383, November 08-12, 1998, San Jose, California, United States
	Amir Zjajo , Jose Pineda De Gyvez , Guido Gronthoud, Structural Fault Modeling and Fault Detection Through Neyman-Pearson Decision Criteria for Analog Integrated Circuits, Journal of Electronic Testing: Theory and Applications, v.22 n.4-6, p.399-409, December 2006
	M. Lubaszewski , E. F. Cota , B. Courtois, Microsystems testing: an approach and open problems, Proceedings of the conference on Design, automation and test in Europe, p.524-529, February 23-26, 1998, Le Palais des Congrés de Paris, France
	S. Cherubal , A. Chatterjee, Test generation based diagnosis of device parameters for analog circuits, Proceedings of the conference on Design, automation and test in Europe, p.596-602, March 2001, Munich, Germany
	Abhijit Chatterjee , Bruce C. Kim , Naveena Nagi, DC Built-In Self-Test for Linear Analog Circuits, IEEE Design & Test, v.13 n.2, p.26-33, June 1996
	Érika F. Cota , Luigi Carro , Marcelo Lubaszewski, A method to diagnose faults in linear analog circuits using an adaptive tester, Proceedings of the conference on Design, automation and test in Europe, p.40-es, January 1999, Munich, Germany
	M. Renovell , F. Azaïs , Y. Bertrand, Optimized implementations of the multi-configuration DFT technique for analog circuits, Proceedings of the conference on Design, automation and test in Europe, p.815-821, February 23-26, 1998, Le Palais des Congrés de Paris, France
	Soumendu Bhattacharya , Abhijit Chatterjee, Optimized wafer-probe and assembled package test design for analog circuits, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.10 n.2, p.303-329, April 2005
	Rajesh Ramadoss , Michael L. Bushnell, Test Generation for Mixed-Signal Devices Using Signal Flow Graphs, Journal of Electronic Testing: Theory and Applications, v.14 n.3, p.189-205, June 1999
	Jing Pang , Janusz Starzyk, Fault Diagnosis in Mixed-Signal Low Testability System, Analog Integrated Circuits and Signal Processing, v.28 n.2, p.161-172, August 2001

Collaborative Colleagues:

Naveena Nagi: colleagues

Abhijit Chatterjee: colleagues

Ashok Balivada: colleagues

Jacob A. Abraham: colleagues

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