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A barrel shift microsystem for parallel processing
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Source International Symposium on Microarchitecture archive
Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture table of contents
Orlando, Florida, United States
Pages: 223 - 229  
Year of Publication: 1990
ISBN:0-89791-413-9
Authors
Reuven Bakalash  Department of Computer Science, State University of New York, Stony Brook, NY
Zhong Xu  Northeast Microelectronics Raearch Institute, Shenyang, P.R.China
Sponsors
IEEE-CS : Computer Society
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
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Downloads (6 Weeks): 1,   Downloads (12 Months): 10,   Citation Count: 0
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ABSTRACT

A flow-through interconnection network microsystem is described. It is part of a parallel SIMD graphics architecture called Cube in which the network interconnects between n pairs of processors and memories. No two accesses involve the same memory or processor and their is an uniform communication distance among the processors. The interconnection network is based on a modular and VLSI implemented Barrel Switch (BS) unit, which provides modularity and flexibility of the entire network. A rotate distance of up to 16 processor-memory pairs is performed in a flow-through manner in a single machine cycle. Structurally, the BS is organised in a simple and repetitive pattern of junction elements and connection paths, extendable in its overall length and its data width, and suited for VLSI implementation.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
R. Bakalash. Cube - The 3-D Frame-Buffer Architecture. Ph.D. Thesis, Ben-Gurion University, Beer-Sheva, Israel. April 1988.
 
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S. M. Kang. Domino-CMOS Barrel Switch for 32-Bit VLSI Processors, IEEE Circuits and Devices Magazine, May 1987, pp.3-8.
 
4
A. Kaufman. Voxel Based Architectures for 3-D Graphics, Proc. of the IFIP Information Processing 86, Dublin, Irland (September 1986), 361-366.
 
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Collaborative Colleagues:
Reuven Bakalash: colleagues
Zhong Xu: colleagues

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