| Entropic bounds on FSM switching |
| Full text |
Pdf
(377 KB)
|
| Source
|
International Symposium on Low Power Electronics and Design
archive
Proceedings of the 1996 international symposium on Low power electronics and design
table of contents
Monterey, California, United States
Pages: 323 - 328
Year of Publication: 1996
ISBN:0-7803-3571-6
|
|
Author
|
|
A. Tyagi
|
Department of Computer Science, Atanasoff Hall, Iowa State University, Ames, IA
|
|
| Sponsors |
|
| Publisher |
IEEE Press
Piscataway, NJ, USA
|
| Bibliometrics |
Downloads (6 Weeks): 1, Downloads (12 Months): 11, Citation Count: 1
|
|
|
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
Gary D. Hachtel , Mariano Hermida , Abelardo Pardo , Massimo Poncino , Fabio Somenzi, Re-encoding sequential circuits to reduce power dissipation, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.70-73, November 06-10, 1994, San Jose, California, United States
|
 |
2
|
Gary D. Hachtel , Enrico Macii , Abelardo Pardo , Fabio Somenzi, Probabilistic analysis of large finite state machines, Proceedings of the 31st annual conference on Design automation, p.270-275, June 06-10, 1994, San Diego, California, United States
[doi> 10.1145/196244.196374]
|
| |
3
|
|
| |
4
|
T. Lengauer and K. Mehlhorn. On the Complexity of VLSI Computations. In Proceedings of CMU Conference on VLSI- VLSI Systems and Computations, pages 89- 99. CMU, Computer Science Press, 1981.
|
| |
5
|
B. Lin and A.R. Newton. Synthesis of Muliple-Level Logic from Symbolic High-Level Description Languages. In Proceedings of IFIP International Conference on VLSI, pages 187-196, August 1989.
|
| |
6
|
3. Monteiro, S. Devadas, B. Lin, C. Y. Tsui, M. Pedram, and A. M. Despain. Exact and Approximate Methods of Switching Activity Estimation in Sequential Logic Circuits. In Proc. of International Workshop on Low Power Design, pages 117-122. ACM/IEEE, 1994.
|
| |
7
|
|
| |
8
|
K. Roy and S.C. Prasad. Circuit Activity Based Logic Synthesis for Low Power Reliable Operations. IEEE Trans. on VLSI Systems, pages 503-513, December 1993.
|
| |
9
|
E. M. Sentovich, K. J. Singh, L. Lavango, C. Moon, R. Muragi, A. Saldhana, H. Savoj, P. Stephen, R. Brayton, and A. Sangiovanni-Vincentelli. SIS: A System for Sequential Circuit Synthesis. Technical Report Memorandum Number UCB/ERL M92/41, Electronics Research Laboratory, Dept. of EECS, University of California, Berkeley, 1992.
|
| |
10
|
Chi-Ying Tsui , Massoud Pedram , Chih-Ang Chen , Alvin M. Despain, Low power state assignment targeting two-and multi-level logic implementations, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.82-87, November 06-10, 1994, San Jose, California, United States
|
| |
11
|
|
| |
12
|
|
 |
13
|
Vamshi Veeramachaneni , Akhilesh Tyagi , Suresh Rajgopal, Re-encoding for low power state assignment of FSMs, Proceedings of the 1995 international symposium on Low power design, p.173-178, April 23-26, 1995, Dana Point, California, United States
[doi> 10.1145/224081.224112]
|
CITED BY
|
Luca Benini , Alessandro Bogliolo , Enrico Macii , Massimo Poncino , Mihai Surmei, Regression-based RTL power models for controllers, Proceedings of the 10th Great Lakes symposium on VLSI, p.147-152, March 02-04, 2000, Chicago, Illinois, United States
|
|