| Layout driven selecting and chaining of partial scan flip-flops |
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Annual ACM IEEE Design Automation Conference
archive
Proceedings of the 33rd annual Design Automation Conference
table of contents
Las Vegas, Nevada, United States
Pages: 262 - 267
Year of Publication: 1996
ISBN:0-89791-779-0
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Authors
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Chau-Shen Chen
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Department of Computer Science, Tsing Hua University, Hsin-Chu, Taiwan 30043 R.O.C.
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Kuang-Hui Lin
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Department of Computer Science, Tsing Hua University, Hsin-Chu, Taiwan 30043 R.O.C.
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TingTing Hwang
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Department of Computer Science, Tsing Hua University, Hsin-Chu, Taiwan 30043 R.O.C.
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Downloads (6 Weeks): 0, Downloads (12 Months): 8, Citation Count: 2
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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D. H. Lee, and S. M. Reddy, "On Determining Scan Flip-Flops in Partial-Scan," Proc. ICCAD-90, pp. 322-325, May 1991.
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A. Bhawmik, C. J. Lin, K.-T. Cheng, and V. D. Agrawal, "Pascant : A Partial Scan and Test Generation System," Proc. Custom Integrated Circuits Conf., May 1991.
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J.-Y. Jou, and K.-T. Cheng, "Timing-Driven Partial Scan," Proc. Int'l Conf. on Computer-Aided Design, pp. 404-407, Nov. 1991.
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"TimberWolf: Mixed Macro / Standard Cell Floorplaning, Placement and Routing Package," Yale U- niversity, Sep. 1991.
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MCNC 2.0 standard cell data book, Mar., 1993.
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R. R. Karp, "Reducibility Among Combinatorial Problems," R.E. Miller and J.W. Thatcher,(eds.), Complexity of Computer Computations, Plenum Press, New York, pp. 85- 103, 1972.
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