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CITED BY 10
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Joon-Seo Yim , Yoon-Ho Hwang , Chang-Jae Park , Hoon Choi , Woo-Seung Yang , Hun-Seung Oh , In-Cheol Park , Chong-Min Kyung, A C-based RTL design verification methodology for complex microprocessor, Proceedings of the 34th annual conference on Design automation, p.83-88, June 09-13, 1997, Anaheim, California, United States
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G. Post , A. Müller , T. Grötker, A system-level co-verification environment for ATM hardware design, Proceedings of the conference on Design, automation and test in Europe, p.424-428, February 23-26, 1998, Le Palais des Congrés de Paris, France
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Yael Abarbanel-Vinov , Neta Aizenbud-Reshef , Ilan Beer , Cindy Eisner , Daniel Geist , Tamir Heyman , Iris Reuveni , Eran Rippel , Irit Shitsevalov , Yaron Wolfsthal , Tali Yatzkar-Haham, On the Effective Deployment of Functional Formal Verification, Formal Methods in System Design, v.19 n.1, p.35-44, July 2001
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