HDL optimization using timed decision tables

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HDL optimization using timed decision tables

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 33rd annual Design Automation Conference table of contents

Las Vegas, Nevada, United States

Pages: 51 - 54

Year of Publication: 1996

ISBN:0-89791-779-0

Authors

Jian Li	Department of Computer Science, University of Illinois, Urbana-Champaign, Urbana, Illinois
Rajesh K. Gupta	Department of Computer Science, University of Illinois, Urbana-Champaign, Urbana, Illinois

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 0, Downloads (12 Months): 6, Citation Count: 9

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references cited by index terms collaborative colleagues peer to peer

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Srinivas Devadas , Abhijit Ghosh , Kurt Keutzer, Logic synthesis, McGraw-Hill, Inc., New York, NY, 1994
	2	P. J. H. King, "Decision tables," The Computer Journal, vol. 10, no. 2, August 1967.
	3	Jian Li, Timed decision tables: A model for embedded system representation and optimization, University of Illinois at Urbana-Champaign, Champaign, IL, 1996
	4	Kamlesh Rath , M. Esen Tuna , Steven D. Johnson, Behavior tables: a basis for system representation and transformational system synthesis, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.736-740, November 07-11, 1993, Santa Clara, California, United States
	5	A. J. W. M. ten Berg , C. Huijs , Th. Krol, Relational algebra as formalism for hardware design, Microprocessing and Microprogramming, v.38 n.1-5, p.403-410, Sept. 1993
	6	Daniel Brand , Reinaldo A. Bergamaschi , Leon Stok, Be careful with don't cares, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.83-86, November 05-09, 1995, San Jose, California, United States
	7	Saburo Muroga, Logic Design and Switching Theory, John Wiley & Sons, Inc., New York, NY, 1979
	8	Giovanni De Micheli, Synthesis and Optimization of Digital Circuits, McGraw-Hill Higher Education, 1994
	9	R. A. Bergamaschi , D. Lobo , A. Kuehlmann, Control optimization in high-level synthesis using behavioral don't cares, Proceedings of the 29th ACM/IEEE conference on Design automation, p.657-661, June 08-12, 1992, Anaheim, California, United States
	10	R. K. Gupta and J. Li, "Control optimization using behavioral don't cares," in Proceedings of the IEEE International S~,tmposium on Circuits and S~,tstems, 1996.
	11	Robert King Brayton , Alberto L. Sangiovanni-Vincentelli , Curtis T. McMullen , Gary D. Hachtel, Logic Minimization Algorithms for VLSI Synthesis, Kluwer Academic Publishers, Norwell, MA, 1984
	12	Giovanni De Micheli , David Ku , Frederic Mailhot , Thomas Truong, The Olympus Synthesis System, IEEE Design & Test, v.7 n.5, p.37-53, September 1990 [doi>10.1109/54.60605]

CITED BY 9

	Jian Li , Rajesh K. Gupta, Decomposition of timed decision tables and its use in presynthesis optimizations, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.22-27, November 09-13, 1997, San Jose, California, United States
	Jian Li , Rajesh K. Gupta, HDL code restructuring using timed decision tables, Proceedings of the 6th international workshop on Hardware/software codesign, p.131-135, March 15-18, 1998, Seattle, Washington, United States
	Raghavendra Rao Loka, Compilation reuse and hybrid compilation: an experiment, ACM SIGPLAN Notices, v.41 n.4, April 2006
	Jian Li , Rajesh K. Gupta, Limited exception modeling and its use in presynthesis optimizations, Proceedings of the 34th annual conference on Design automation, p.341-346, June 09-13, 1997, Anaheim, California, United States
	J. Li , R. K. Gupta, An algorithm to determine mutually exclusive operations in behavioral descriptions, Proceedings of the conference on Design, automation and test in Europe, p.457-465, February 23-26, 1998, Le Palais des Congrés de Paris, France
	Raul Camposano, Behavioral synthesis, Proceedings of the 33rd annual conference on Design automation, p.33-34, June 03-07, 1996, Las Vegas, Nevada, United States
	Ki-Seok Chung , Taewhan Kim , C. I. Liu, Behavioral-level partitioning for low power design in control-dominated application, Proceedings of the 10th Great Lakes symposium on VLSI, p.156-161, March 02-04, 2000, Chicago, Illinois, United States
	Rolf Ernst, Codesign of Embedded Systems: Status and Trends, IEEE Design & Test, v.15 n.2, p.45-54, April 1998
	Rolf Ernst, Codesign of embedded systems: status and trends, Readings in hardware/software co-design, Kluwer Academic Publishers, Norwell, MA, 2001