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Pseudo-random testing and signature analysis for mixed-signal circuits
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Source International Conference on Computer Aided Design archive
Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design table of contents
San Jose, California, United States
Pages: 102 - 107  
Year of Publication: 1995
ISBN:0-8186-7213-7
Authors
Chen-Yang Pan  Department of Electrical and Computer Engineering, University of California, Santa Barbara
Kwang-Ting Cheng  Department of Electrical and Computer Engineering, University of California, Santa Barbara
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CS : Computer Society
Publisher
IEEE Computer Society  Washington, DC, USA
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Downloads (6 Weeks): 5,   Downloads (12 Months): 16,   Citation Count: 3
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ABSTRACT

In this paper, we address the problem of functional testing of mixed-signal circuits using pseudo-random patterns. By embedding the linear, time-invariant (LTI) analog circuit between a digital-to-analog converter (DAC) and an analog-to-digital converter (ADC), we can model the analog and converter circuitry as a digital LTI system and test it using the pseudo-random vectors. We give mathematical analysis and formulate the pseudo-random testing process as the linear transformation of a random process by the analog LTI device under test (DUT). We choose the first and the second moments of the transformed random process, which are closely related to the functionality of the DUT, as the signatures for fault detection. We show that such signatures can be estimated by proper arithmetic operations on the output responses of the DUT to the vectors generated by LFSRs. We illustrate and compare the effectiveness of several possible choices of signatures, through analysis and experimental results of several circuits, in terms of their fault detection capabilities and the testing hardware requirements.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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N. Nagi and J. A. Abraham. "Hierarchical fault modeling tbr analog and mixed-signal circuits", VLSI Test Symposium, Apr. 1994, pp. 96-101
 
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M. Soma, "A Design-For-Test Methodology for Active Analog Filter",Internationl Test Conference, Oct. 1993, pp. 183-192
 
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M. Ohletz, "Hybrid Built-In Self-Test for Mixed Analog/Digital Integtated Circuits", European Test Conference, Apr. 1991, pp. 307-316
 
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Collaborative Colleagues:
Chen-Yang Pan: colleagues
Kwang-Ting Cheng: colleagues

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