A memory selection algorithm for high-performance pipelines

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A memory selection algorithm for high-performance pipelines

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European Design Automation Conference archive
Proceedings of the conference on European design automation table of contents

Brighton, England

Pages: 124 - 129

Year of Publication: 1995

ISBN:0-8186-7156-4

Authors

Smita Bakshi	Department of Information and Computer Science, University of California, Irvine, CA
Daniel D. Gajski	Department of Information and Computer Science, University of California, Irvine, CA

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 5, Citation Count: 13

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Smita Bakshi , Daniel D. Gajski, A component selection algorithm for high-performance pipelines, Proceedings of the conference on European design automation, p.400-405, September 19-23, 1994, Grenoble, France
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	3	L. Stok, Interconnect optimisation during data path allocation, Proceedings of the conference on European design automation, March 12-15, 1990, Glasgow, Scotland
	4	Peter Marwedel, The mimola design system: Tools for the design of digital processors, Proceedings of the 21st conference on Design automation, p.587-593, June 25-27, 1984, Albuquerque, New Mexico, United States
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	8	Florin Balasa , Francky Catthoor , Hugo de Man, Exact evaluation of memory size for multi-dimensional signal processing systems, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.669-672, November 07-11, 1993, Santa Clara, California, United States
	9	Florin Balasa , Francky Catthoor , Hugo De Man, Dataflow-driven memory allocation for multi-dimensional signal processing systems, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.31-34, November 06-10, 1994, San Jose, California, United States
	10	P. E. R. Lippens , J. L. van Meerbergen , W. F. J. Verhaegh , A. van der Werf, Allocation of multiport memories for hierarchical data stream, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.728-735, November 07-11, 1993, Santa Clara, California, United States
	11	David Karchmer , Jonathan Rose, Definition and solution of the memory packing problem for field-programmable systems, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.20-26, November 06-10, 1994, San Jose, California, United States
	12	S. Bakshi and D. D. Gajski, "A memory selection algorithm for high-performance pipelines," Tech. Rep. 95-03, Dept. of Information and Computer Science, University of California, Irvine, 1995.
	13	Toshiba ASIC Gate Array Library: TClgOG/lgL Series, MegaceII, Meg@nction. Toshiba Corporation, 1990.
	14	Lars Svensson , Francky Catthoor, Application-Driven Architecture Synthesis, Kluwer Academic Publishers, Norwell, MA, 1993

CITED BY 13

	Preeti Ranjan Panda , Nikil D. Dutt , Alexandru Nicolau, Exploiting off-chip memory access modes in high-level synthesis, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.333-340, November 09-13, 1997, San Jose, California, United States
	Peter Grun , Nikil Dutt , Alex Nicolau, APEX: access pattern based memory architecture exploration, Proceedings of the 14th international symposium on Systems synthesis, September 30-October 03, 2001, Montréal, P.Q., Canada
	Pradip K. Jha , Nikil D. Dutt, Library Mapping for Memories, Proceedings of the 1997 European conference on Design and Test, p.288, March 17-20, 1997
	Peter Grun , Nikil Dutt , Alex Nicolau, Access pattern-based memory and connectivity architecture exploration, ACM Transactions on Embedded Computing Systems (TECS), v.2 n.1, p.33-73, February 2003
	Preeti Ranjan Panda , Nikil D. Dutt , Alexandru Nicolau, On-chip vs. off-chip memory: the data partitioning problem in embedded processor-based systems, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.5 n.3, p.682-704, July 2000
	Russell Tessier , Vaughn Betz , David Neto , Thiagaraja Gopalsamy, Power-aware RAM mapping for FPGA embedded memory blocks, Proceedings of the internation symposium on Field programmable gate arrays, February 22-24, 2006, Monterey, California, USA
	P. R. Panda , F. Catthoor , N. D. Dutt , K. Danckaert , E. Brockmeyer , C. Kulkarni , A. Vandercappelle , P. G. Kjeldsberg, Data and memory optimization techniques for embedded systems, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.6 n.2, p.149-206, April 2001
	Jungeun Kim , Taewhan Kim, Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design, Proceedings of the 42nd annual conference on Design automation, June 13-17, 2005, San Diego, California, USA
	F. Vermeulen , F. Catthoor , D. Verkest , H. De Man, Extended design reuse trade-offs in hardware-software architecture mapping, Proceedings of the eighth international workshop on Hardware/software codesign, p.103-107, May 2000, San Diego, California, United States
	F. Vermeulen , L. Nachtergaele , F. Catthoor , D. Verkest , H. De Man, Flexible hardware acceleration for multimedia oriented microprocessors, Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture, p.171-177, December 2000, Monterey, California, United States
	Frederik Vermeulen , Francky Catthoor , Lode Nachtergaele , Diederik Verkest , Hugo De Man, Power-efficient flexible processor architecture for embedded applications, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.11 n.3, p.376-385, June 2003
	J. Ph. Diguet , D. Chillet , O. Sentieys, A Framework for High Level Estimations of Signal Processing VLSI Implementations, Journal of VLSI Signal Processing Systems, v.25 n.3, p.261-284, July 2000
	Daniel D. Gajski , Frank Vahid , Sanjiv Narayan , Jie Gong, SpecSyn: an environment supporting the specify-explore-refine paradigm for hardware/software system design, Readings in hardware/software co-design, Kluwer Academic Publishers, Norwell, MA, 2001