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Tree restructuring approach to mapping problem in cellular-architecture FPGAs
Source European Design Automation Conference archive
Proceedings of the conference on European design automation table of contents
Brighton, England
Pages: 60 - 65  
Year of Publication: 1995
ISBN:0-8186-7156-4
Authors
N. Ramineni
M. Chrzanowska-Jeske
N. Buddi
Sponsor
SIGDA: ACM Special Interest Group on Design Automation
Publisher
IEEE Computer Society Press  Los Alamitos, CA, USA
Bibliometrics
Downloads (6 Weeks): n/a,   Downloads (12 Months): n/a,   Citation Count: 0
Additional Information:

index terms   collaborative colleagues  

Tools and Actions: Review this Article  

INDEX TERMS

Primary Classification:
  B. Hardware
  B.6 LOGIC DESIGN
      B.6.1 Design Styles
          Subjects: Cellular arrays and automata

Additional Classification:
  B. Hardware
  B.5 REGISTER-TRANSFER-LEVEL IMPLEMENTATION
  B.6 LOGIC DESIGN
      B.6.1 Design Styles
          Subjects: Combinational logic
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Gate arrays


General Terms:
Algorithms, Design, Performance, Theory

Collaborative Colleagues:
N. Ramineni: colleagues
M. Chrzanowska-Jeske: colleagues
N. Buddi: colleagues

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