Device selection for system partitioning

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Device selection for system partitioning

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European Design Automation Conference archive
Proceedings of the conference on European design automation table of contents

Brighton, England

Pages: 2 - 7

Year of Publication: 1995

ISBN:0-8186-7156-4

Authors

Ulrich Weinmann	Computer Science Research Center at the University of Karlsruhe (FZI), Haid-und-Neu-Str. 10-14, 76131 Karlsruhe, Germany
Oliver Bringmann	Computer Science Research Center at the University of Karlsruhe (FZI), Haid-und-Neu-Str. 10-14, 76131 Karlsruhe, Germany
Wolfgang Rosenstiel	FZI and University of Tübingen, Sand 13, 72076 Tübingen, Germany

Sponsor

SIGDA: ACM Special Interest Group on Design Automation

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	C.H. Aikens, "Facility location models for distribution planning", European Journal of Operational Research 22, pp. 263-279, 1985.
	2	P. Asherden, "The VHDL-Cookbook", Department of Computer Science, University of Adelaide, 1990.
	3	J. Beasly, "Lagrangean heuristics for location problems", European Journal of Operational Research 65, pp. 383-399, 1993.
	4	G. Cornuejols, R. Sridharan and J. Thizy, "A comparision of heuristics and relaxations for the Capacitated Plant Location Problem", Euro. Journ. of Operational Research 50, pp. 280-297, 1991.
	5	P. Gutberlet , Wolfgang Rosenstiel, Timing preserving interface transformations for the synthesis of behavioral VHDL, Proceedings of the conference on European design automation, p.618-623, September 19-23, 1994, Grenoble, France
	6	K.H. Kernighan, S. Lin, "An Efficient Heuristic Procedure for Partitioning Graphs", Bell System Technical Journal, vol. 49, no. 2, 1970.
	7	S. Kirkpatrick, C. Gelatt and M. Vecchi, "Optimization by Simulated Annealing", Science, vol. 220, no. 4589, pp.671-680, 1983.
	8	Roman Kužnar , Franc Brglez , Krzysztof Kozminski, Cost minimization of partitions into multiple devices, Proceedings of the 30th international conference on Design automation, p.315-320, June 14-18, 1993, Dallas, Texas, United States [doi>10.1145/157485.164910]
	9	Henry L. Owen , Ubaid R. Khan , Joseph L. A. Hughes, FPGA-based emulator architectures, Selected papers from the Oxford 1993 international workshop on field programmable logic and applications on More FPGAs, p.398-409, July 1994, Oxford, United Kingdom
	10	Colin R. Reeves, Modern heuristic techniques for combinatorial problems, John Wiley & Sons, Inc., New York, NY, 1993
	11	U. Weinmann, W. Rosenstiel, "Technology Mapping for Sequential Circuits based on Retiming Techniques", Proceedings of the EURO-DAC 93, Hamburg, 1993.
	12	U. Weinmann, W. Rosenstiel, "Universal Technology Mapping for Table-Lookup FPGAs", IFIP Workshop on Logic and Architecture Synthesis, Grenoble, 1993.
	13	U. Weinmann, W. Rosenstiel, "Network Flow based Clustering and Partitioning for FPGAs", IFIP Workshop on Logic and Architecture Synthesis, Grenoble, Dec. 1994.