Sequencer-based data path synthesis of regular iterative algorithms

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Sequencer-based data path synthesis of regular iterative algorithms

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 31st annual Design Automation Conference table of contents

San Diego, California, United States

Pages: 155 - 160

Year of Publication: 1994

ISBN:0-89791-653-0

Authors

Mohammed Aloqeely	Department of Electrical and Computer Engineering, Syracuse University, Syracuse, NY
C. Y. Roger Chen	Department of Electrical and Computer Engineering, Syracuse University, Syracuse, NY

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 11, Citation Count: 5

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references cited by index terms collaborative colleagues peer to peer

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	M. C. McFarland, A.C. Parker and R. Composano, "The High Level Synthesis of Digital Systems," Proc. oflEEE, vol. 78, no. 2, pp. 301- 318, Feb. 1990.
	2	Daniel D. Gajski , Nikil D. Dutt , Allen C.-H. Wu , Steve Y.-L. Lin, High-level synthesis: introduction to chip and system design, Kluwer Academic Publishers, Norwell, MA, 1992
	3	C. Tseng and D. Siewiorek, "Automated Synthesis of DataPaths in Digital Systems," IEEE Trans. on Computer-Aided Design, July 1986, pp. 379-395.
	4	F. S. Tsai and Y. C. Hsu, "STAR: An Automatic Data Path Allocator," IEEE Trans. on Computer-Aided Design, Sept. 1992, pp. 1053-1064.
	5	Imtiaz Ahmed and C.Y. Roger Chen, " Post-Processor for Data Path Synthesis Using Multiport Memories," IEEE ICCAD 1991 pp. 276-79.
	6	"LINDO: Linear INteractive and Discrete Optimizer of linear, integer, and quadratic programming problems," LINDO Systems, Inc.
	7	David L. Kuck, Structure of Computers and Computations, John Wiley & Sons, Inc., New York, NY, 1978
	8	Thomas T. Cormen , Charles E. Leiserson , Ronald L. Rivest, Introduction to algorithms, MIT Press, Cambridge, MA, 1990
	9	C.Y. Roger Chen, and Michael Moricz, "A Delay Distribution Methodology for the Optimal Systolic Synthesis of Linear Recurrence Algorithms," IEEE Trans. on Computer Aided Design, vol. 10, No. 6, June 1991, pp. 685-697.
	10	Carver Mead , Lynn Conway, Introduction to VLSI Systems, Addison-Wesley Longman Publishing Co., Inc., Boston, MA, 1979
	11	Dan I Moldovan , Jose A. B Fortes, Partitioning and mapping algorithms into fixed size systolic arrays, IEEE Transactions on Computers, v.35 n.1, p.1-12, Jan. 1986 [doi>10.1109/TC.1986.1676652]
	12	N. Park and A.C. Parker, "Sehwa: A Software Package for Synthesis of Pipelines from Behavioral Specifications," IEEE Trans. on Computer- Aided Design, March 1988, pp. 356-370.
	13	Gaetano Borriello , Ewald Detjens, High-level synthesis: current status and future directions, Proceedings of the 25th ACM/IEEE conference on Design automation, p.477-482, June 12-15, 1988, Atlantic City, New Jersey, United States
	14	E G. Paulin and J. E Knight, "Force Directed Scheduling for the Behavioral Synthesis of ASICs," IEEE Trans. on Computer Aided Design, June 1989, pp. 661-79.
	15	Mohammed A. Aloqeely, Sequencers: a new alternative for data path synthesis, 1995
	16	B. Haroun and M. Elmasry, "Architectural Synthesis for DSP Silicon Compilers," IEEE Trans. on Computer-Aided Design, vol. 8. No. 4. April 1989 pp. 431-447.

CITED BY 5

	Jason Cong , Yiping Fan , Wei Jiang, Platform-based resource binding using a distributed register-file microarchitecture, Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design, November 05-09, 2006, San Jose, California
	M. Balakrishnan , Heman Khanna, Allocation of FIFO structures in RTL data paths, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.5 n.3, p.294-310, July 2000
	Youn-Long Lin, Recent developments in high-level synthesis, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.2 n.1, p.2-21, Jan. 1997
	C. Y. Roger Chen , Mohammed Aloqeely, A new technique for exploiting regularity in data path synthesis, Proceedings of the conference on European design automation, p.394-399, September 19-23, 1994, Grenoble, France
	Ding-Ming Kwai , Behrooz Parhami, Scalable Linear Array Architecture with Data-Driven Control for Ultrahigh-Speed Vector Quantization, Journal of VLSI Signal Processing Systems, v.28 n.3, p.235-243, July 2001