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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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1
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M. Komiya, "Future Technological and Economic Prospects for VLSI, " ISSCC 93, pp. 16-19.
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2
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C. R. Barrett, "Microprocessor Evolution and Technology Impact," 1993 Symposium on VLSI Technology, May 17-19, Kyoto, pp. 7-10.
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W. J. Spencer, "National Interests in Global Semiconductor Industry," Keynote Speech, IEDM-93, Washington D.C., Dec. 5-8, 1993.
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Word News, Solid State Technology, September 1993.
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"The Siege of Intel," The Economist, February 12, pp. 63-64.
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"Status 1993 - A report on the Integrated Circuit Industry," Integrated Circuits Engineering Corporation.
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T. Masuchara, K. Itoh, K. Seki and K. Sasaki, "VLSI Memories: Present Status and Future Prospects," IEICE Trans. Vol. E 74. No 1, January 1991.
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V. Menon, "Microcontamination, Defect Measurement and Control in ULSI Manufacturing," Techcon 90, San Jose, Oct. 16-18, 1990 pp. 224.
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W. Maly, "Evolution of Microelectronics from the Cost of Manufacturing Perspective," Research Report No. CMUCAD-91-16, September 1991.
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11
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Y. Tarui, et al., "New DRAM pricing trends: The Bi rule," IEEE Circuits & Design, March 1991, pp. 44-45.
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W. Maly, H. Jacobs and A. Kersch, " Estimation of Wafer Cost for Technology Design," IEDM-93, Washington D.C., Dec. 5-8, 1993, pp. 35.6.1 - 35.6.4.
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13
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I.A. Saadat, M.T. Thomas, A. Gattiker and W. Maly," Wafer Cost Modeling and Analysis for Strategy Planning Purposes," Eight Annual SRC/ARPA CIM-IC Workshop, Aug. 1993.
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14
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L. Gwennap, "Estimating IC Manufacturing Costs," Microprocessor Report, Aug. 2, 1993, pp. 12-16.
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SIA Technology Road Map - Workshop Conclusions; November 1993.
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M. Ogirima, "Process Innovation for Future Semiconductor Industry," 1993 Symposium on VLSI Technology, May 17-19, 1993, Kyoto, pp. 1-5.
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M. Moslehi, et al., "Microelectronics Manufacturing Science and Technology (MMST) : Single Wafer RTP-Based 0.35 mm CMOS Fabrication", IEDM-93, Washington D.C., Dec. 5-8, 1993, pp. 27.1.1 - 27.1.4.
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20
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A.V. Ferris-Prabhu, "Parameters for optimization of device productivity at wafer level," IBM Burlington Technical Bulletin, TR 19.90488, Nov. 1989.
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21
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H.T. Heineken and W. Maly, "Manufacturability Analysis Environment - MAPEX", to appear in Proc. of CICC-94.
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22
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F. Abu-Nofal, et. al. "A Three Million-Transistors Microprocessor ", 1993 ISSCC, Feb. 1993, pp. 108-109.
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23
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IEEE Spectrum, Dec. 1993, pp. 20-25.
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24
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Proc. of ISSCC 1991, 1992, 1993 and CICC of 1989.
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25
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W. Maly, "Computer-Aided Design for VLSI Circuit Manufacturability," Proc. of IEEE, Vol. 78, No. 2, Feb. 1990, pp. 356- 392.
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26
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W. Maly, H.T. Heineken and F. Agricola," Yield Model for Manufacturing Strategy Planning and Product Shrink Applications," to be published.
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27
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T. W. Williams," Test Technology 20 Years and Beyond", ITC1989, Washington D.C.p.7.
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P.K. Chatterjee and G.B. Larrabee, " ULSI Research and Development in the United States: Status and Outlook," Proc. of the Fourth International Symposium on ULSI Science and Technology, 1993, pp. 1-19.
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29
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30
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W. Maly, D. Feltham, A. Gattiker, M. Hobaugh, K. Backus and M. Thomas, "Multi-Chip Module Smart Substrate System," Accepted for publication in IEEE Design and Test Magazine, June 1994.
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31
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A. Gattiker, W. Maly and M. Thomas, "Are There Any Alternatives to Known Good Die?", to appear in Proceedings of IEEE Multi-Chip Module Conference, March 1994.
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32
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T.E. Marchok and W. Maly, "Automatic Synthesis and the Cost of Testing", to appear in Proc. of CICC-94.
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33
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Z.J. Lamnios, Beyond MMST: The virtual factory," Solid State Technology, Feb. 1994, pp. 25-26.
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CITED BY 7
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W. Maly , H. Heineken , J. Khare , P. K. Nag, Design for manufacturability in submicron domain, Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design, p.690-697, November 10-14, 1996, San Jose, California, United States
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