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A communicating Petri net model for the design of concurrent asynchronous modules
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 31st annual Design Automation Conference table of contents
San Diego, California, United States
Pages: 49 - 55  
Year of Publication: 1994
ISBN:0-89791-653-0
Authors
Gjalt G. de Jong  IMEC Kapeldreef 75, B 3001 Leuven, Belgium
Bill Lin  IMEC Kapeldreef 75, B 3001 Leuven, Belgium
Sponsors
IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 0,   Downloads (12 Months): 13,   Citation Count: 10
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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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T.A. CmJ, Synthesis of Self-timed VLSI Circuits fi'om Graph-theoretic Specifications, Ph. D. thesis, MIT, 1987.
 
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R. VAN GLABBEEK AND F. VAANDRAGER, "Petri Net Models for Algebraic Theories of Concurrency", P1vc. of PARLE, LNCS 259, 1987.
 
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P. VANBEKBERGEN, C. YKMAN-COUVREUR, AND B. LIN, "A Generalized Signal Transition Graph Model for Modeling Mixed Asynchronous/Synchronous and Arbitration Behavior", Proc. Int. Workshop on Logic Synthesis, 1993.
 
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