A methodology for efficient estimation of switching activity in sequential logic circuits

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A methodology for efficient estimation of switching activity in sequential logic circuits

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 31st annual Design Automation Conference table of contents

San Diego, California, United States

Pages: 12 - 17

Year of Publication: 1994

ISBN:0-89791-653-0

Authors

José Monteiro	Department of EECS, MIT, Cambridge
Srinivas Devadas	Department of EECS, MIT, Cambridge
Bill Lin	IMEC, Leuven

Sponsors

IEEE-CAS : Circuits & Systems
SIGDA: ACM Special Interest Group on Design Automation
EDAC : Electronic Design Automation Consortium

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 5, Downloads (12 Months): 22, Citation Count: 24

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references cited by index terms collaborative colleagues peer to peer

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Randal E. Bryant, Graph-based algorithms for Boolean function manipulation, IEEE Transactions on Computers, v.35 n.8, p.677-691, Aug. 1986 [doi>10.1109/TC.1986.1676819]
	2	A. Ghosh , S. Devadas , K. Keutzer , J. White, Estimation of average switching activity in combinational and sequential circuits, Proceedings of the 29th ACM/IEEE conference on Design automation, p.253-259, June 08-12, 1992, Anaheim, California, United States
	3	José Monteiro , Srinivas Devadas , Abhijit Ghosh, Retiming sequential circuits for low power, Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design, p.398-402, November 07-11, 1993, Santa Clara, California, United States
	4	F. Najm. Transition Density: A New Measure of Activity in Digital Circuits. IEEE Transactions on Computer-Aided Design, 12(2):310-323, February 1993.
	5	James M. Ortega , Werner C. Rheinboldt, Iterative solution of nonlinear equations in several variables, Society for Industrial and Applied Mathematics, Philadelphia, PA, 2000
	6	A. Papoulis. Probability, Random Variables and Stochastic Processes. McGraw-Hill, 3ra edition, 1991.

CITED BY 24

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	Li-Pen Yuan , Sung-Mo Kang, A sequential procedure for average power analysis of sequential circuits, Proceedings of the 1997 international symposium on Low power electronics and design, p.231-234, August 18-20, 1997, Monterey, California, United States
	Li-Pen Yuan , Chin-Chi Teng , Sung-Mo Kang, Statistical estimation of average power dissipation in sequential circuits, Proceedings of the 34th annual conference on Design automation, p.377-382, June 09-13, 1997, Anaheim, California, United States
	Farid N. Najm , Shashank Goel , Ibrahim N. Hajj, Power estimation in sequential circuits, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.635-640, June 12-16, 1995, San Francisco, California, United States
	Yen-Fong Lee , Shi-Yu Huang , Sheng-Yu Hsu , I-Ling Chen , Cheng-Tao Shieh , Jian-Cheng Lin , Shih-Chieh Chang, Power estimation starategies for a low-power security processor, Proceedings of the 2005 conference on Asia South Pacific design automation, January 18-21, 2005, Shanghai, China
	Joseph N. Kozhaya , Farid N. Najm, Accurate power estimation for large sequential circuits, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.488-493, November 09-13, 1997, San Jose, California, United States
	Janardhan H. Satyanarayana , Keshab K. Parhi, Power Estimation of Digital Data Paths Using HEAT, IEEE Design & Test, v.17 n.2, p.101-110, April 2000
	T. Uchino , F. Minami , M. Murakata , T. Mitsuhashi, Switching activity analysis for sequential circuits using Boolean approximation method, Proceedings of the 1996 international symposium on Low power electronics and design, p.79-84, August 12-14, 1996, Monterey, California, United States
	Tan-Li Chou , Kaushik Roy, Statistical estimation of sequential circuit activity, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.34-37, November 05-09, 1995, San Jose, California, United States
	Vikram Saxena , Farid N. Najm , Ibrahim N. Hajj, Estimation of state line statistics in sequential circuits, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.7 n.3, p.455-473, July 2002
	Xiangfeng Chen , Peicheng Pen , C. L. Liu, Desensitization for power reduction in sequential circuits, Proceedings of the 33rd annual conference on Design automation, p.795-800, June 03-07, 1996, Las Vegas, Nevada, United States
	Jiing-Yuan Lin , Tai-Chien Liu , Wen-Zen Shen, A cell-based power estimation in CMOS combinational circuits, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.304-309, November 06-10, 1994, San Jose, California, United States
	Peter A. Beerel , Kenneth Y. Yun , Steven M. Nowick , Pei-Chuan Yeh, Estimation and bounding of energy consumption in burst-mode control circuits, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.26-33, November 05-09, 1995, San Jose, California, United States
	Huy T. Nguyen , Abhijit Chatterjee , Rabindra K. Roy, Activity Measures for Fast Relative Power Estimation in Numerical Transformation for Low Power DSP Synthesis, Journal of VLSI Signal Processing Systems, v.18 n.1, p.25-38, Jan. 1998
	Mazhar Alidina , José Monteiro , Srinivas Devadas , Abhijit Ghosh , Marios Papaefthymiou, Precomputation-based sequential logic optimization for low power, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.74-81, November 06-10, 1994, San Jose, California, United States
	Vikram Saxena , Farid N. Najm , Ibrahim Hajj, Monte-Carlo Approach for Power Estimation in Sequential Circuits, Proceedings of the 1997 European conference on Design and Test, p.416, March 17-20, 1997
	Tan-Li Chou , Kaushik Roy, Power Estimation Under Uncertain Delays, Integrated Computer-Aided Engineering, v.5 n.2, p.107-116, April 1998
	M. Koegst , K. Feske , G. Franke, State assignment for FSM low power design, Proceedings of the conference on European design automation, p.28-33, September 1996, Geneva, Switzerland
	Farid N. Najm, Towards a high-level power estimation capability, Proceedings of the 1995 international symposium on Low power design, p.87-92, April 23-26, 1995, Dana Point, California, United States
	Hong-Yu Xie , Sarma B. K. Vrudhula, A Technique for Estimating Signal Activity in Logic Circuits, Integrated Computer-Aided Engineering, v.5 n.2, p.141-152, April 1998
	Zhanping Chen , Mark Johnson , Liqiong Wei , Kaushik Roy, Estimation of standby leakage power in CMOS circuits considering accurate modeling of transistor stacks, Proceedings of the 1998 international symposium on Low power electronics and design, p.239-244, August 10-12, 1998, Monterey, California, United States
	Farid N. Najm, Power estimation techniques for integrated circuits, Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design, p.492-499, November 05-09, 1995, San Jose, California, United States
	Jo Dale Carothers , Radjakichenin Radjassamy, Low Power VLSI Design Techniques - The Current State, Integrated Computer-Aided Engineering, v.5 n.2, p.153-176, April 1998
	Massoud Pedram, Power minimization in IC design: principles and applications, ACM Transactions on Design Automation of Electronic Systems (TODAES), v.1 n.1, p.3-56, Jan. 1996