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Techniques for compressing program address traces
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Source International Symposium on Microarchitecture archive
Proceedings of the 27th annual international symposium on Microarchitecture table of contents
San Jose, California, United States
Pages: 32 - 39  
Year of Publication: 1994
ISBN:0-89791-707-3
Author
Andrew R. Pleszkun  Department of Electrical and Computer Engineering, University of Colorado-Boulder, Boulder, CO
Sponsors
IEEE-CS\TCMM : TC on Microprocessors & Microcomputers
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
ACM  New York, NY, USA
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ABSTRACT

In this paper a technique for generating consistent, reproducible traces with about an order of magnitude better compression than standard general-purpose compression programs is described. With this approach, the trace is read once, an intermediate form is generated and then read as the input to the second pass over the address stream. No program source code is required, and this technique will work on address streams that include OS calls. As a result of the way the address trace is encoded and processed, representing each reference requires only a fraction of a bit, between 0.00114 to 0.878 bits per reference. For example, the roughly 1.6 billion references generated by the xlisp benchmark from the SPEC92 suite can be stored using only about 48.6 million bytes. Depending on the benchmarks, more or less bits per references may be needed.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

AgSH86
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Beck93
 
Hamm77
D. W. Hammerstrom, Analysis of Memory Referencing Behavior, Ph.D. Thesis, Department of Electrical Engineering, University of Illinois at Urbana-Champaign, Champaign, Illinois, (1977).
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KeHW94
 
LaPI88
 
Laru93
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Welc84
T.A. Welch, "A Technique for High Performance Data Compression", IEEE Computer, voi. t7, no. 6 (June 1984), pp. 8-19.

CITED BY  13
 
 
 
 
 


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