Toward zero-cost branches using instruction registers

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

Toward zero-cost branches using instruction registers

Full text

Pdf (646 KB)

Source

International Symposium on Microarchitecture archive
Proceedings of the 25th annual international symposium on Microarchitecture table of contents

Portland, Oregon, United States

Pages: 214 - 217

Year of Publication: 1992

ISBN:0-8186-3175-9

Also published in ...

Authors

Kent D. Wilken
David W. Goodwin

Sponsors

IEEE-CS : Computer Society
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 4, Citation Count: 1

Additional Information:

references cited by index terms collaborative colleagues peer to peer

Tools and Actions:	Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/144953.145810 What is a DOI?

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	John Adrian Bondy, Graph Theory With Applications, Elsevier Science Ltd, 1976
	2	G. Chaitin et al. Register allocation via coloring. Computer Languages, 6:47-57, 1981.
	3	Jack W. Davidson , David B. Whalley, Reducing the cost of branches by using registers, ACM SIGARCH Computer Architecture News, v.18 n.3a, p.182-191, June 1990
	4	D. R. Ditzel , H. R. McLellan, Branch folding in the CRISP microprocessor: reducing branch delay to zero, Proceedings of the 14th annual international symposium on Computer architecture, p.2-8, June 02-05, 1987, Pittsburgh, Pennsylvania, United States [doi>10.1145/30350.30351]
	5	Charles N. Fischer , Richard J. LeBlanc, Jr., Crafting a compiler, Benjamin-Cummings Publishing Co., Inc., Redwood City, CA, 1988
	6	David A. Patterson , John L. Hennessy, Computer architecture: a quantitative approach, Morgan Kaufmann Publishers Inc., San Francisco, CA, 1990
	7	IBM. IBM RISC System//6000 Technology. IBM, 1990.
	8	M. Jolmson. Superscalar Microprocessor Design. Prentice Hall, 1991.
	9	J. Lee aald A. J. Smith. Branch prediction strategies and branch target buffer design. IEEE Computer, pages 6-22, January 1984.
	10	David J. Lilja, Reducing the Branch Penalty in Pipelined Processors, Computer, v.21 n.7, p.47-55, July 1988 [doi>10.1109/2.68]
	11	Sml Microsystems. The $PARC Architecture Manual, Version 7. Still Microsystelns, 1987.
	12	Hewlett Packard. PA-RISC 1.1 Architecture and Instruction Set Reference Manual. Hewlett Packard, 1990.
	13	Tse-Yu Yeh , Yale N. Patt, Alternative implementations of two-level adaptive branch prediction, Proceedings of the 19th annual international symposium on Computer architecture, p.124-134, May 19-21, 1992, Queensland, Australia

CITED BY

Nathalie Drach , André Seznec, MIDEE: smoothing branch and instruction cache miss penalties on deep pipelines, Proceedings of the 26th annual international symposium on Microarchitecture, p.193-201, December 01-03, 1993, Austin, Texas, United States

INDEX TERMS

Primary Classification:
B. Hardware
B.1 CONTROL STRUCTURES AND MICROPROGRAMMING
B.1.5 Microcode Applications
Subjects: Instruction set interpretation

Additional Classification:
B. Hardware
B.3 MEMORY STRUCTURES
B.3.2 Design Styles
Subjects: Cache memories
B.5 REGISTER-TRANSFER-LEVEL IMPLEMENTATION
B.5.1 Design
Subjects: Arithmetic and logic units

General Terms:
Design, Experimentation, Performance

Collaborative Colleagues:

Kent D. Wilken: colleagues

David W. Goodwin: colleagues

Peer to Peer - Readers of this Article have also read:

Constructing reality Proceedings of the 11th annual international conference on Systems documentation
Douglas A. Powell , Norman R. Ball , Mansel W. Griffiths
Data structures for quadtree approximation and compression Communications of the ACM 28, 9
Hanan Samet
A hierarchical single-key-lock access control using the Chinese remainder theorem Proceedings of the 1992 ACM/SIGAPP Symposium on Applied computing
Kim S. Lee , Huizhu Lu , D. D. Fisher
An intelligent component database for behavioral synthesis Proceedings of the 27th ACM/IEEE Design Automation Conference on
Gwo-Dong Chen , Daniel D. Gajski
The GemStone object database management system Communications of the ACM 34, 10
Paul Butterworth , Allen Otis , Jacob Stein

This Article has also been published in:

ACM SIGMICRO Newsletter
Volume 23 , Issue 1-2 Dec. 1992

Adobe Acrobat

QuickTime

Windows Media Player

Real Player