Controlling and sequencing a heavily pipelined floating-point operator

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Controlling and sequencing a heavily pipelined floating-point operator

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International Symposium on Microarchitecture archive
Proceedings of the 25th annual international symposium on Microarchitecture table of contents

Portland, Oregon, United States

Pages: 111 - 114

Year of Publication: 1992

ISBN:0-8186-3175-9

Also published in ...

Authors

André Seznec
Karl Courtel

Sponsors

IEEE-CS : Computer Society
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

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Downloads (6 Weeks): 0, Downloads (12 Months): 3, Citation Count: 0

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references index terms collaborative colleagues peer to peer

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	E. Anderson , Z. Bai , J. Dongarra , A. Greenbaum , A. McKenney , J. Du Croz , S. Hammerling , J. Demmel , C. Bischof , D. Sorensen, LAPACK: a portable linear algebra library for high-performance computers, Proceedings of the 1990 conference on Supercomputing, p.2-11, October 1990, New York, New York, United States
	2	"Etude et d4veloppement d'un coprocesseur de calcul matriciel' OPAC" K.Courtel, Th~se de l'universit~ de Rennes I, Janv.91 processing: the architecture of the AP120B/FPS 164 Family" Computer, septembre1981
	3	J.Dongara, J.DuCroz, I.Duff, S.Hammarling "A set of level 3 Basic Linear Algebra Subprograms" Argonne Technical Report May 1988.
	4	Monica Sin-Ling Lam, A systolic array optimizing compiler, 1987
	5	B. R. Rau , C. D. Glaeser, Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing, Proceedings of the 14th annual workshop on Microprogramming, p.183-198, December 01-01, 1981, Chatham, Massachusetts, United States
	6	B. Ramakrishna Rau , Christopher D. Glaeser , Raymond L. Picard, Efficient code generation for horizontal architectures: Compiler techniques and architectural support, ACM SIGARCH Computer Architecture News, v.10 n.3, p.131-139, April 1982
	7	A.Seznec, K.Courtel "OPAC: a cost-effective floating-point coprocessor , INRIA report , May 1991
	8	A.Seznec, K.Courtel "Controlling and Sequencing a heavily pipelined floating-point operator", iNRIA report , Nov. 1991

INDEX TERMS

Primary Classification:
B. Hardware
B.5 REGISTER-TRANSFER-LEVEL IMPLEMENTATION
B.5.1 Design
Subjects: Styles (e.g., parallel, pipeline, special-purpose)

General Terms:
Design, Performance

Collaborative Colleagues:

André Seznec: colleagues

Karl Courtel: colleagues

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This Article has also been published in:

ACM SIGMICRO Newsletter
Volume 23 , Issue 1-2 Dec. 1992

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