Exploiting instruction-level parallelism with the conjugate register file scheme

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

Exploiting instruction-level parallelism with the conjugate register file scheme

Full text

Pdf (466 KB)

Source

International Symposium on Microarchitecture archive
Proceedings of the 25th annual international symposium on Microarchitecture table of contents

Portland, Oregon, United States

Pages: 29 - 32

Year of Publication: 1992

ISBN:0-8186-3175-9

Also published in ...

Authors

Meng-chou Chang
Feipei Lai
Rung-ji Shang

Sponsors

IEEE-CS : Computer Society
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing

Publisher

IEEE Computer Society Press Los Alamitos, CA, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 9, Citation Count: 1

Additional Information:

references cited by index terms collaborative colleagues peer to peer

Tools and Actions:	Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/144953.144986 What is a DOI?

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	G. J. Chaitin, Register allocation & spilling via graph coloring, Proceedings of the 1982 SIGPLAN symposium on Compiler construction, p.98-105, June 23-25, 1982, Boston, Massachusetts, United States
	2	Michael D. Smith , Monica S. Lam , Mark A. Horowitz, Boosting beyond static scheduling in a superscalar processor, Proceedings of the 17th annual international symposium on Computer Architecture, p.344-354, May 28-31, 1990, Seattle, Washington, United States

CITED BY

Hayato Yamana , Mitsuhisa Sato , Yuetsu Kodama , Hirofumi Sakane , Shuichi Sakai , Yoshinori Yamaguchi, A macrotask-level unlimited speculative execution on multiprocessors, Proceedings of the 9th international conference on Supercomputing, p.328-337, July 03-07, 1995, Barcelona, Spain

INDEX TERMS

Primary Classification:
C. Computer Systems Organization
C.0 GENERAL
Subjects: Instruction set design (e.g., RISC, CISC, VLIW)

Additional Classification:
B. Hardware
B.2 ARITHMETIC AND LOGIC STRUCTURES
B.2.1 Design Styles
Subjects: Parallel
B.5 REGISTER-TRANSFER-LEVEL IMPLEMENTATION
B.5.1 Design
Subjects: Styles (e.g., parallel, pipeline, special-purpose)
B.5.2 Design Aids
Subjects: Optimization

G. Mathematics of Computing
G.2 DISCRETE MATHEMATICS

General Terms:
Algorithms, Design, Performance

Collaborative Colleagues:

Meng-chou Chang: colleagues

Feipei Lai: colleagues

Rung-ji Shang: colleagues

Peer to Peer - Readers of this Article have also read:

Constructing reality Proceedings of the 11th annual international conference on Systems documentation
Douglas A. Powell , Norman R. Ball , Mansel W. Griffiths
Data structures for quadtree approximation and compression Communications of the ACM 28, 9
Hanan Samet
A hierarchical single-key-lock access control using the Chinese remainder theorem Proceedings of the 1992 ACM/SIGAPP Symposium on Applied computing
Kim S. Lee , Huizhu Lu , D. D. Fisher
An intelligent component database for behavioral synthesis Proceedings of the 27th ACM/IEEE Design Automation Conference on
Gwo-Dong Chen , Daniel D. Gajski
The GemStone object database management system Communications of the ACM 34, 10
Paul Butterworth , Allen Otis , Jacob Stein

This Article has also been published in:

ACM SIGMICRO Newsletter
Volume 23 , Issue 1-2 Dec. 1992

Adobe Acrobat

QuickTime

Windows Media Player

Real Player